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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/PowerPC/PPCGenAsmMatcher.inc 3996 case PPC::CTR: OpKind = MCK_CTRRC; break;
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 2580 static const MCPhysReg ImplicitList7[] = { PPC::R0, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::LR, PPC::CTR, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
2582 static const MCPhysReg ImplicitList9[] = { PPC::CTR, 0 };
2584 static const MCPhysReg ImplicitList11[] = { PPC::CTR, PPC::RM, 0 };
2591 static const MCPhysReg ImplicitList18[] = { PPC::CTR, PPC::LR, PPC::RM, 0 };
2598 static const MCPhysReg ImplicitList25[] = { PPC::R0, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::LR, PPC::CTR, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
2599 static const MCPhysReg ImplicitList26[] = { PPC::LR, PPC::CTR, 0 };
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 1162 { PPC::CTR },
1416 PPC::CTR,
1956 { 66U, PPC::CTR },
2244 { 66U, PPC::CTR },
2323 { PPC::CTR, -2U },
2600 { PPC::CTR, 66U },
2876 { PPC::CTR, -2U },
3153 { PPC::CTR, 66U },
lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp 1180 RegNo = isPPC64()? PPC::CTR8 : PPC::CTR;
lib/Target/PowerPC/PPCCTRLoops.cpp 117 if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8))
120 if (MO.clobbersPhysReg(PPC::CTR) || MO.clobbersPhysReg(PPC::CTR8))
lib/Target/PowerPC/PPCISelLowering.cpp 5118 Ops.push_back(DAG.getRegister(isPPC64 ? PPC::CTR8 : PPC::CTR, PtrVT));
5254 cast<RegisterSDNode>(Callee)->getReg() == PPC::CTR) ||
lib/Target/PowerPC/PPCInstrInfo.cpp 566 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
577 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
634 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
648 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
720 else if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8)
737 if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8)
764 if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8)
1316 if (Cond[1].getReg() == PPC::CTR8 || Cond[1].getReg() == PPC::CTR)
1395 if (I->definesRegister(PPC::CTR) || I->definesRegister(PPC::CTR8))
1441 if (Pred[1].getReg() == PPC::CTR8 || Pred[1].getReg() == PPC::CTR) {
1460 if (Pred[1].getReg() == PPC::CTR8 || Pred[1].getReg() == PPC::CTR) {
1494 if (Pred[1].getReg() == PPC::CTR8 || Pred[1].getReg() == PPC::CTR)
1528 if (Pred1[1].getReg() == PPC::CTR8 || Pred1[1].getReg() == PPC::CTR)
1530 if (Pred2[1].getReg() == PPC::CTR8 || Pred2[1].getReg() == PPC::CTR)
4192 MF->getSubtarget<PPCSubtarget>().isPPC64() ? PPC::CTR8 : PPC::CTR,
lib/Target/PowerPC/PPCRegisterInfo.cpp 290 markSuperRegs(Reserved, PPC::CTR);