reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/PowerPC/PPCGenInstrInfo.inc

 2579 static const MCPhysReg ImplicitList6[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
 2587 static const MCPhysReg ImplicitList14[] = { PPC::LR8, 0 };
 2590 static const MCPhysReg ImplicitList17[] = { PPC::LR8, PPC::X2, 0 };
 2592 static const MCPhysReg ImplicitList19[] = { PPC::CTR8, PPC::LR8, PPC::RM, 0 };
 2593 static const MCPhysReg ImplicitList20[] = { PPC::LR8, PPC::RM, 0 };
 2597 static const MCPhysReg ImplicitList24[] = { PPC::X0, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, 0 };

gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc

 1234   { PPC::LR8 },
 1810   { 65U, PPC::LR8 },
 2098   { 65U, PPC::LR8 },
 2370   { PPC::LR8, 65U },
 2645   { PPC::LR8, -2U },
 2923   { PPC::LR8, 65U },
 3198   { PPC::LR8, -2U },

lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp

 1177       RegNo = isPPC64()? PPC::LR8 : PPC::LR;

lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

   66   unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;

lib/Target/PowerPC/PPCFrameLowering.cpp

  835   unsigned LRReg       = isPPC64 ? PPC::LR8 : PPC::LR;
 1317       if (Reg == PPC::LR || Reg == PPC::LR8 || Reg == PPC::RM) continue;

lib/Target/PowerPC/PPCISelLowering.cpp

14972     PPC::X12, PPC::LR8, PPC::CTR8, 0

lib/Target/PowerPC/PPCRegisterInfo.cpp

   81   : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR,
  295   markSuperRegs(Reserved, PPC::LR8);