|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
Declarations
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 3889 extern const TargetRegisterClass VRRCRegClass;
References
gen/lib/Target/PowerPC/PPCGenFastISel.inc 135 return fastEmitInst_r(PPC::VCLZB, &PPC::VRRCRegClass, Op0, Op0IsKill);
144 return fastEmitInst_r(PPC::VCLZH, &PPC::VRRCRegClass, Op0, Op0IsKill);
153 return fastEmitInst_r(PPC::VCLZW, &PPC::VRRCRegClass, Op0, Op0IsKill);
162 return fastEmitInst_r(PPC::VCLZD, &PPC::VRRCRegClass, Op0, Op0IsKill);
197 return fastEmitInst_r(PPC::VPOPCNTB, &PPC::VRRCRegClass, Op0, Op0IsKill);
206 return fastEmitInst_r(PPC::VPOPCNTH, &PPC::VRRCRegClass, Op0, Op0IsKill);
215 return fastEmitInst_r(PPC::VPOPCNTW, &PPC::VRRCRegClass, Op0, Op0IsKill);
224 return fastEmitInst_r(PPC::VPOPCNTD, &PPC::VRRCRegClass, Op0, Op0IsKill);
265 return fastEmitInst_r(PPC::VCTZB, &PPC::VRRCRegClass, Op0, Op0IsKill);
274 return fastEmitInst_r(PPC::VCTZH, &PPC::VRRCRegClass, Op0, Op0IsKill);
283 return fastEmitInst_r(PPC::VCTZW, &PPC::VRRCRegClass, Op0, Op0IsKill);
292 return fastEmitInst_r(PPC::VCTZD, &PPC::VRRCRegClass, Op0, Op0IsKill);
342 return fastEmitInst_r(PPC::XSABSQP, &PPC::VRRCRegClass, Op0, Op0IsKill);
419 return fastEmitInst_r(PPC::VRFIP, &PPC::VRRCRegClass, Op0, Op0IsKill);
486 return fastEmitInst_r(PPC::VRFIM, &PPC::VRRCRegClass, Op0, Op0IsKill);
541 return fastEmitInst_r(PPC::VRFIN, &PPC::VRRCRegClass, Op0, Op0IsKill);
597 return fastEmitInst_r(PPC::XSNEGQP, &PPC::VRRCRegClass, Op0, Op0IsKill);
659 return fastEmitInst_r(PPC::XSCVDPQP, &PPC::VRRCRegClass, Op0, Op0IsKill);
730 return fastEmitInst_r(PPC::VCTSXS_0, &PPC::VRRCRegClass, Op0, Op0IsKill);
781 return fastEmitInst_r(PPC::VCTUXS_0, &PPC::VRRCRegClass, Op0, Op0IsKill);
899 return fastEmitInst_r(PPC::XSSQRTQP, &PPC::VRRCRegClass, Op0, Op0IsKill);
963 return fastEmitInst_r(PPC::VRFIZ, &PPC::VRRCRegClass, Op0, Op0IsKill);
1074 return fastEmitInst_r(PPC::VCFSX_0, &PPC::VRRCRegClass, Op0, Op0IsKill);
1150 return fastEmitInst_r(PPC::VCFUX_0, &PPC::VRRCRegClass, Op0, Op0IsKill);
1393 return fastEmitInst_r(PPC::VREFP, &PPC::VRRCRegClass, Op0, Op0IsKill);
1463 return fastEmitInst_r(PPC::VRSQRTEFP, &PPC::VRRCRegClass, Op0, Op0IsKill);
1603 return fastEmitInst_r(PPC::VEXTSB2W, &PPC::VRRCRegClass, Op0, Op0IsKill);
1610 return fastEmitInst_r(PPC::VEXTSB2D, &PPC::VRRCRegClass, Op0, Op0IsKill);
1625 return fastEmitInst_r(PPC::VEXTSH2W, &PPC::VRRCRegClass, Op0, Op0IsKill);
1632 return fastEmitInst_r(PPC::VEXTSH2D, &PPC::VRRCRegClass, Op0, Op0IsKill);
1649 return fastEmitInst_r(PPC::VEXTSW2D, &PPC::VRRCRegClass, Op0, Op0IsKill);
1760 return fastEmitInst_rr(PPC::VADDUBM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
1769 return fastEmitInst_rr(PPC::VADDUHM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
1778 return fastEmitInst_rr(PPC::VADDUWM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
1787 return fastEmitInst_rr(PPC::VADDUDM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
1796 return fastEmitInst_rr(PPC::VADDUQM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
1886 return fastEmitInst_rr(PPC::VAND, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
1955 return fastEmitInst_rr(PPC::XSADDQP, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
1970 return fastEmitInst_rr(PPC::VADDFP, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2041 return fastEmitInst_rr(PPC::XSDIVQP, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2203 return fastEmitInst_rr(PPC::XSMULQP, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2286 return fastEmitInst_rr(PPC::XSSUBQP, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2301 return fastEmitInst_rr(PPC::VSUBFP, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2360 return fastEmitInst_rr(PPC::VMULUWM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2446 return fastEmitInst_rr(PPC::VOR, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2495 return fastEmitInst_rr(PPC::VSLB, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2504 return fastEmitInst_rr(PPC::VSLH, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2513 return fastEmitInst_rr(PPC::VSLW, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2522 return fastEmitInst_rr(PPC::VSLD, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2544 return fastEmitInst_rr(PPC::VMAXSB, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2553 return fastEmitInst_rr(PPC::VMAXSH, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2562 return fastEmitInst_rr(PPC::VMAXSW, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2582 return fastEmitInst_rr(PPC::VMINSB, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2591 return fastEmitInst_rr(PPC::VMINSH, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2600 return fastEmitInst_rr(PPC::VMINSW, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2626 return fastEmitInst_rr(PPC::VSRAB, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2635 return fastEmitInst_rr(PPC::VSRAH, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2644 return fastEmitInst_rr(PPC::VSRAW, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2653 return fastEmitInst_rr(PPC::VSRAD, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2709 return fastEmitInst_rr(PPC::VSRB, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2718 return fastEmitInst_rr(PPC::VSRH, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2727 return fastEmitInst_rr(PPC::VSRW, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2736 return fastEmitInst_rr(PPC::VSRD, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2764 return fastEmitInst_rr(PPC::VSUBUBM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2773 return fastEmitInst_rr(PPC::VSUBUHM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2782 return fastEmitInst_rr(PPC::VSUBUWM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2791 return fastEmitInst_rr(PPC::VSUBUDM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2800 return fastEmitInst_rr(PPC::VSUBUQM, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2845 return fastEmitInst_rr(PPC::VMAXUB, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2854 return fastEmitInst_rr(PPC::VMAXUH, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2863 return fastEmitInst_rr(PPC::VMAXUW, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2883 return fastEmitInst_rr(PPC::VMINUB, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2892 return fastEmitInst_rr(PPC::VMINUH, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2901 return fastEmitInst_rr(PPC::VMINUW, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2970 return fastEmitInst_rr(PPC::VXOR, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3037 return fastEmitInst_rr(PPC::VSLB, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3046 return fastEmitInst_rr(PPC::VSLH, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3055 return fastEmitInst_rr(PPC::VSLW, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3064 return fastEmitInst_rr(PPC::VSLD, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3092 return fastEmitInst_rr(PPC::VSRAB, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3101 return fastEmitInst_rr(PPC::VSRAH, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3110 return fastEmitInst_rr(PPC::VSRAW, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3119 return fastEmitInst_rr(PPC::VSRAD, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3147 return fastEmitInst_rr(PPC::VSRB, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3156 return fastEmitInst_rr(PPC::VSRH, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3165 return fastEmitInst_rr(PPC::VSRW, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3174 return fastEmitInst_rr(PPC::VSRD, &PPC::VRRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 4235 &PPC::VRRCRegClass,
4807 &PPC::VRRCRegClass,
lib/Target/PowerPC/PPCAsmPrinter.cpp 557 PPC::VRRCRegClass.contains(Reg) ||
lib/Target/PowerPC/PPCFrameLowering.cpp 367 if (!MO.isReg() || !PPC::VRRCRegClass.contains(MO.getReg()))
1918 } else if (PPC::VRRCRegClass.contains(Reg) ||
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 375 if (RegInfo->getRegClass(Reg) == &PPC::VRRCRegClass) {
lib/Target/PowerPC/PPCISelLowering.cpp 712 addRegisterClass(MVT::v4f32, &PPC::VRRCRegClass);
713 addRegisterClass(MVT::v4i32, &PPC::VRRCRegClass);
714 addRegisterClass(MVT::v8i16, &PPC::VRRCRegClass);
715 addRegisterClass(MVT::v16i8, &PPC::VRRCRegClass);
866 addRegisterClass(MVT::v2i64, &PPC::VRRCRegClass);
867 addRegisterClass(MVT::v1i128, &PPC::VRRCRegClass);
882 addRegisterClass(MVT::f128, &PPC::VRRCRegClass);
3512 RC = &PPC::VRRCRegClass;
3515 RC = Subtarget.hasQPX() ? &PPC::QSRCRegClass : &PPC::VRRCRegClass;
3519 RC = &PPC::VRRCRegClass;
4000 unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass);
4367 unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass);
6954 else if (PPC::VRRCRegClass.contains(*I))
14347 return std::make_pair(0U, &PPC::VRRCRegClass);
15042 else if (PPC::VRRCRegClass.contains(*I))
15043 RC = &PPC::VRRCRegClass;
lib/Target/PowerPC/PPCInstrInfo.cpp 991 else if (PPC::VRRCRegClass.contains(DestReg, SrcReg))
1050 } else if (PPC::VRRCRegClass.hasSubClassEq(RC)) {
1088 } else if (PPC::VRRCRegClass.contains(Reg)) {
1136 } else if (PPC::VRRCRegClass.hasSubClassEq(RC)) {
1174 } else if (PPC::VRRCRegClass.contains(Reg)) {
1297 if (Subtarget.hasVSX() && RC == &PPC::VRRCRegClass)
3857 if (Subtarget.hasVSX() && RC == &PPC::VRRCRegClass)
lib/Target/PowerPC/PPCRegisterInfo.cpp 339 for (TargetRegisterClass::iterator I = PPC::VRRCRegClass.begin(),
340 IE = PPC::VRRCRegClass.end(); I != IE; ++I)
473 else if (RC == &PPC::VRRCRegClass)
lib/Target/PowerPC/PPCVSXCopy.cpp 67 return IsRegInClass(Reg, &PPC::VRRCRegClass, MRI);
lib/Target/PowerPC/PPCVSXSwapRemoval.cpp 169 isRegInClass(Reg, &PPC::VRRCRegClass));
912 if (DstRC == &PPC::VRRCRegClass) {