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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 3886 extern const TargetRegisterClass VSRCRegClass;
References
gen/lib/Target/PowerPC/PPCGenFastISel.inc 351 return fastEmitInst_r(PPC::XVABSSP, &PPC::VSRCRegClass, Op0, Op0IsKill);
363 return fastEmitInst_r(PPC::XVABSDP, &PPC::VSRCRegClass, Op0, Op0IsKill);
416 return fastEmitInst_r(PPC::XVRSPIP, &PPC::VSRCRegClass, Op0, Op0IsKill);
431 return fastEmitInst_r(PPC::XVRDPIP, &PPC::VSRCRegClass, Op0, Op0IsKill);
483 return fastEmitInst_r(PPC::XVRSPIM, &PPC::VSRCRegClass, Op0, Op0IsKill);
498 return fastEmitInst_r(PPC::XVRDPIM, &PPC::VSRCRegClass, Op0, Op0IsKill);
538 return fastEmitInst_r(PPC::XVRSPIC, &PPC::VSRCRegClass, Op0, Op0IsKill);
550 return fastEmitInst_r(PPC::XVRDPIC, &PPC::VSRCRegClass, Op0, Op0IsKill);
606 return fastEmitInst_r(PPC::XVNEGSP, &PPC::VSRCRegClass, Op0, Op0IsKill);
618 return fastEmitInst_r(PPC::XVNEGDP, &PPC::VSRCRegClass, Op0, Op0IsKill);
727 return fastEmitInst_r(PPC::XVCVSPSXWS, &PPC::VSRCRegClass, Op0, Op0IsKill);
739 return fastEmitInst_r(PPC::XVCVDPSXDS, &PPC::VSRCRegClass, Op0, Op0IsKill);
778 return fastEmitInst_r(PPC::XVCVSPUXWS, &PPC::VSRCRegClass, Op0, Op0IsKill);
790 return fastEmitInst_r(PPC::XVCVDPUXDS, &PPC::VSRCRegClass, Op0, Op0IsKill);
832 return fastEmitInst_r(PPC::XVRSPI, &PPC::VSRCRegClass, Op0, Op0IsKill);
844 return fastEmitInst_r(PPC::XVRDPI, &PPC::VSRCRegClass, Op0, Op0IsKill);
908 return fastEmitInst_r(PPC::XVSQRTSP, &PPC::VSRCRegClass, Op0, Op0IsKill);
917 return fastEmitInst_r(PPC::XVSQRTDP, &PPC::VSRCRegClass, Op0, Op0IsKill);
960 return fastEmitInst_r(PPC::XVRSPIZ, &PPC::VSRCRegClass, Op0, Op0IsKill);
975 return fastEmitInst_r(PPC::XVRDPIZ, &PPC::VSRCRegClass, Op0, Op0IsKill);
1006 return fastEmitInst_r(PPC::MTVSRWS, &PPC::VSRCRegClass, Op0, Op0IsKill);
1015 return fastEmitInst_r(PPC::XSCVDPSPN, &PPC::VSRCRegClass, Op0, Op0IsKill);
1071 return fastEmitInst_r(PPC::XVCVSXWSP, &PPC::VSRCRegClass, Op0, Op0IsKill);
1083 return fastEmitInst_r(PPC::XVCVSXDDP, &PPC::VSRCRegClass, Op0, Op0IsKill);
1147 return fastEmitInst_r(PPC::XVCVUXWSP, &PPC::VSRCRegClass, Op0, Op0IsKill);
1159 return fastEmitInst_r(PPC::XVCVUXDDP, &PPC::VSRCRegClass, Op0, Op0IsKill);
1390 return fastEmitInst_r(PPC::XVRESP, &PPC::VSRCRegClass, Op0, Op0IsKill);
1405 return fastEmitInst_r(PPC::XVREDP, &PPC::VSRCRegClass, Op0, Op0IsKill);
1460 return fastEmitInst_r(PPC::XVRSQRTESP, &PPC::VSRCRegClass, Op0, Op0IsKill);
1475 return fastEmitInst_r(PPC::XVRSQRTEDP, &PPC::VSRCRegClass, Op0, Op0IsKill);
1669 return fastEmitInst_r(PPC::XXBRW, &PPC::VSRCRegClass, Op0, Op0IsKill);
1678 return fastEmitInst_r(PPC::XXBRD, &PPC::VSRCRegClass, Op0, Op0IsKill);
1883 return fastEmitInst_rr(PPC::XXLAND, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
1907 return fastEmitInst_rr(PPC::MTVSRDD, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
1964 return fastEmitInst_rr(PPC::XVADDSP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
1979 return fastEmitInst_rr(PPC::XVADDDP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2050 return fastEmitInst_rr(PPC::XVDIVSP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2059 return fastEmitInst_rr(PPC::XVDIVDP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2081 return fastEmitInst_rr(PPC::XVMAXSP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2090 return fastEmitInst_rr(PPC::XVMAXDP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2127 return fastEmitInst_rr(PPC::XVMINSP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2136 return fastEmitInst_rr(PPC::XVMINDP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2212 return fastEmitInst_rr(PPC::XVMULSP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2224 return fastEmitInst_rr(PPC::XVMULDP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2295 return fastEmitInst_rr(PPC::XVSUBSP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2310 return fastEmitInst_rr(PPC::XVSUBDP, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2443 return fastEmitInst_rr(PPC::XXLOR, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2967 return fastEmitInst_rr(PPC::XXLXOR, &PPC::VSRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3442 return fastEmitInst_ri(PPC::XXSPLTW, &PPC::VSRCRegClass, Op0, Op0IsKill, imm1);
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 4218 &PPC::VSRCRegClass,
4223 &PPC::VSRCRegClass,
4228 &PPC::VSRCRegClass,
4233 &PPC::VSRCRegClass,
4245 &PPC::VSRCRegClass,
4804 &PPC::VSRCRegClass,
lib/Target/PowerPC/PPCISelLowering.cpp 796 addRegisterClass(MVT::v4i32, &PPC::VSRCRegClass);
797 addRegisterClass(MVT::v4f32, &PPC::VSRCRegClass);
798 addRegisterClass(MVT::v2f64, &PPC::VSRCRegClass);
862 addRegisterClass(MVT::v2i64, &PPC::VSRCRegClass);
14358 return std::make_pair(0U, &PPC::VSRCRegClass);
lib/Target/PowerPC/PPCInstrInfo.cpp 912 PPC::VSRCRegClass.contains(SrcReg)) {
914 TRI->getMatchingSuperReg(DestReg, PPC::sub_64, &PPC::VSRCRegClass);
921 PPC::VSRCRegClass.contains(DestReg)) {
923 TRI->getMatchingSuperReg(SrcReg, PPC::sub_64, &PPC::VSRCRegClass);
993 else if (PPC::VSRCRegClass.contains(DestReg, SrcReg))
1052 } else if (PPC::VSRCRegClass.hasSubClassEq(RC)) {
1090 } else if (PPC::VSRCRegClass.contains(Reg)) {
1138 } else if (PPC::VSRCRegClass.hasSubClassEq(RC)) {
1176 } else if (PPC::VSRCRegClass.contains(Reg)) {
1298 RC = &PPC::VSRCRegClass;
3858 return &PPC::VSRCRegClass;
lib/Target/PowerPC/PPCRegisterInfo.cpp 474 return &PPC::VSRCRegClass;
lib/Target/PowerPC/PPCVSXCopy.cpp 63 return IsRegInClass(Reg, &PPC::VSRCRegClass, MRI);
lib/Target/PowerPC/PPCVSXSwapRemoval.cpp 168 return (isRegInClass(Reg, &PPC::VSRCRegClass) ||
913 Register VSRCTmp1 = MRI->createVirtualRegister(&PPC::VSRCRegClass);
914 Register VSRCTmp2 = MRI->createVirtualRegister(&PPC::VSRCRegClass);