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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/PowerPC/PPCGenDAGISel.inc37162 /* 94981*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
37205 /* 95070*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
37227 /* 95125*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
37250 /* 95185*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
37285 /* 95266*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
37328 /* 95355*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
37350 /* 95410*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
37373 /* 95470*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
39008 /* 98518*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
39011 /* 98529*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
39016 /* 98548*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
39033 /* 98582*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
39036 /* 98593*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
39041 /* 98612*/ OPC_EmitInteger, MVT::i32, PPC::VSSRCRegClassID,
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 2643 static const MCOperandInfo OperandInfo44[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2651 static const MCOperandInfo OperandInfo52[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2868 static const MCOperandInfo OperandInfo269[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2868 static const MCOperandInfo OperandInfo269[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2868 static const MCOperandInfo OperandInfo269[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2873 static const MCOperandInfo OperandInfo274[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2874 static const MCOperandInfo OperandInfo275[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2874 static const MCOperandInfo OperandInfo275[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2876 static const MCOperandInfo OperandInfo277[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2877 static const MCOperandInfo OperandInfo278[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2881 static const MCOperandInfo OperandInfo282[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2881 static const MCOperandInfo OperandInfo282[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2881 static const MCOperandInfo OperandInfo282[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2881 static const MCOperandInfo OperandInfo282[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2897 static const MCOperandInfo OperandInfo298[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 1708 { VSSRC, VSSRCBits, 376, 64, sizeof(VSSRCBits), PPC::VSSRCRegClassID, 1, true },
4370 &PPCMCRegisterClasses[VSSRCRegClassID],
lib/Target/PowerPC/PPCFastISel.cpp 152 return RC->getID() == PPC::VSSRCRegClassID;
lib/Target/PowerPC/PPCInstrInfo.h 473 case PPC::VSSRCRegClassID:
lib/Target/PowerPC/PPCRegisterInfo.cpp 444 case PPC::VSSRCRegClassID: