reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenDAGISel.inc

96788 /*218913*/  /*SwitchOpcode*/ 58|128,2/*314*/, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->219231

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc

49520 /*106483*/  /*SwitchOpcode*/ 25|128,3/*409*/, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->106896

gen/lib/Target/AMDGPU/R600GenDAGISel.inc

 7504 /* 28833*/  /*SwitchOpcode*/ 113, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->28949

gen/lib/Target/AVR/AVRGenDAGISel.inc

 1216 /*  2103*/  /*SwitchOpcode*/ 34, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->2140

gen/lib/Target/Mips/MipsGenDAGISel.inc

23848 /* 44744*/  /*SwitchOpcode*/ 67, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->44814

gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc

57237 /*121953*/  /*SwitchOpcode*/ 111|128,3/*495*/, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->122452

gen/lib/Target/PowerPC/PPCGenDAGISel.inc

22211 /* 55098*/  /*SwitchOpcode*/ 79, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->55180

gen/lib/Target/RISCV/RISCVGenDAGISel.inc

 9248 /* 17145*/  /*SwitchOpcode*/ 89|128,3/*473*/, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->17622

gen/lib/Target/SystemZ/SystemZGenDAGISel.inc

19875 /* 37214*/  /*SwitchOpcode*/ 103|128,2/*359*/, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->37577

gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc

  471 /*   729*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
  505 /*   789*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
  539 /*   848*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
  573 /*   908*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 1077 /*  1818*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 1110 /*  1881*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 1639 /*  2871*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 1670 /*  2931*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 2283 /*  4040*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 2312 /*  4092*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 2341 /*  4143*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 2370 /*  4195*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 2909 /*  5161*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 2935 /*  5209*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 3339 /*  5979*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 3367 /*  6034*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 3931 /*  7106*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 3957 /*  7158*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 4339 /*  7895*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 4360 /*  7935*/      OPC_CheckOpcode, TARGET_VAL(ISD::ATOMIC_LOAD_OR),
 5464 /*  9966*/      /*SwitchOpcode*/ 88|128,1/*216*/, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->10186
 6683 /* 12335*/      /*SwitchOpcode*/ 105|128,2/*361*/, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->12700
13928 /* 27061*/  /*SwitchOpcode*/ 89|128,4/*601*/, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->27666

include/llvm/CodeGen/SelectionDAGNodes.h

 1414            N->getOpcode() == ISD::ATOMIC_LOAD_OR      ||
 1471            N->getOpcode() == ISD::ATOMIC_LOAD_OR      ||

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 3784   case ISD::ATOMIC_LOAD_OR:

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

  170   case ISD::ATOMIC_LOAD_OR:
 1720   case ISD::ATOMIC_LOAD_OR:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

  596   case ISD::ATOMIC_LOAD_OR:
 6521           Opcode == ISD::ATOMIC_LOAD_OR ||

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 4597   case AtomicRMWInst::Or:   NT = ISD::ATOMIC_LOAD_OR; break;

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

   91   case ISD::ATOMIC_LOAD_OR:             return "AtomicLoadOr";

lib/CodeGen/TargetLoweringBase.cpp

  463     OP_TO_LIBCALL(ISD::ATOMIC_LOAD_OR, SYNC_FETCH_AND_OR)

lib/Target/AMDGPU/SIISelLowering.cpp

  740   setTargetDAGCombine(ISD::ATOMIC_LOAD_OR);
 9980   case ISD::ATOMIC_LOAD_OR:

lib/Target/ARM/ARMISelLowering.cpp

 1232     setOperationAction(ISD::ATOMIC_LOAD_OR,   MVT::i32, Expand);

lib/Target/Mips/Mips16ISelLowering.cpp

  136   setOperationAction(ISD::ATOMIC_LOAD_OR,     MVT::i32,   Expand);

lib/Target/SystemZ/SystemZISelLowering.cpp

  225   setOperationAction(ISD::ATOMIC_LOAD_OR,   MVT::i32, Custom);
 4992   case ISD::ATOMIC_LOAD_OR:

lib/Target/X86/X86ISelLowering.cpp

  470     setOperationAction(ISD::ATOMIC_LOAD_OR, VT, Custom);
27113   case ISD::ATOMIC_LOAD_OR:
27166   if (Opc == ISD::ATOMIC_LOAD_OR && isNullConstant(RHS)) {
27669   case ISD::ATOMIC_LOAD_OR:
28425   case ISD::ATOMIC_LOAD_OR: