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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 1542 case ISD::CTLZ_ZERO_UNDEF: return visitCTLZ_ZERO_UNDEF(N);
8062 if (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ_ZERO_UNDEF, VT)) {
8064 return DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SDLoc(N), VT, N0);
8076 return DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SDLoc(N), VT, N0);
20165 Count.getOpcode() == ISD::CTLZ_ZERO_UNDEF) &&
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 2669 case ISD::CTLZ_ZERO_UNDEF:
4086 case ISD::CTLZ_ZERO_UNDEF:
4141 case ISD::CTLZ_ZERO_UNDEF:
4158 Node->getOpcode() == ISD::CTLZ_ZERO_UNDEF) {
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 63 case ISD::CTLZ_ZERO_UNDEF:
1693 case ISD::CTLZ_ZERO_UNDEF:
2501 SDValue HiLZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, NVT, Hi);
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp 390 case ISD::CTLZ_ZERO_UNDEF:
803 case ISD::CTLZ_ZERO_UNDEF:
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 76 case ISD::CTLZ_ZERO_UNDEF:
889 case ISD::CTLZ_ZERO_UNDEF:
2889 case ISD::CTLZ_ZERO_UNDEF:
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 2904 case ISD::CTLZ_ZERO_UNDEF: {
4333 case ISD::CTLZ_ZERO_UNDEF:
4446 case ISD::CTLZ_ZERO_UNDEF:
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 6214 setValue(&I, DAG.getNode(CI->isZero() ? ISD::CTLZ : ISD::CTLZ_ZERO_UNDEF,
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 390 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
lib/CodeGen/SelectionDAG/TargetLowering.cpp 6228 if (Node->getOpcode() == ISD::CTLZ_ZERO_UNDEF &&
6235 if (isOperationLegalOrCustom(ISD::CTLZ_ZERO_UNDEF, VT)) {
6238 SDValue CTLZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, VT, Op);
lib/CodeGen/TargetLoweringBase.cpp 678 setOperationAction(ISD::CTLZ_ZERO_UNDEF, VT, Expand);
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 354 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Custom);
1159 case ISD::CTLZ_ZERO_UNDEF:
2308 return Opc == ISD::CTLZ || Opc == ISD::CTLZ_ZERO_UNDEF;
2319 Op.getOpcode() == ISD::CTLZ_ZERO_UNDEF;
2323 ISDOpc = ISD::CTLZ_ZERO_UNDEF;
2429 SDValue LZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i64, L);
lib/Target/AMDGPU/R600ISelLowering.cpp 244 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Custom);
lib/Target/AMDGPU/SIISelLowering.cpp 383 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Custom);
458 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i16, Promote);
lib/Target/ARM/ARMISelLowering.cpp 1079 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, LibCall);
lib/Target/BPF/BPFISelLowering.cpp 115 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Custom);
lib/Target/SystemZ/SystemZISelLowering.cpp 258 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Promote);
lib/Target/X86/X86ISelLowering.cpp 356 setOperationPromotedToType(ISD::CTLZ_ZERO_UNDEF, MVT::i8 , MVT::i32);
361 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i8 , Custom);
362 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i16 , Custom);
363 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32 , Custom);
366 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Custom);
27743 case ISD::CTLZ_ZERO_UNDEF: return LowerCTLZ(Op, Subtarget, DAG);