reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/TargetLowering.h

 2277     case ISD::UADDO:
 2591     if (Opcode != ISD::UADDO)

lib/CodeGen/CodeGenPrepare.cpp

 1266   if (!TLI->shouldFormOverflowOp(ISD::UADDO,

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 1501   case ISD::UADDO:              return visitADDO(N);
 2248         N0.getOpcode() == ISD::UADDO ||
 2382       V.getOpcode() != ISD::UADDO && V.getOpcode() != ISD::USUBO)
 2692         TLI.isOperationLegalOrCustom(ISD::UADDO, N->getValueType(0)))
 2693       return DAG.getNode(ISD::UADDO, DL, N->getVTList(), N0, N1);
 2743   if (Carry1.getOpcode() != ISD::UADDO)
 2755   } else if (Carry0.getOpcode() == ISD::UADDO &&
 2820        (N0.getOpcode() == ISD::UADDO && N0.getResNo() == 0 &&
 4198       return DAG.getNode(IsSigned ? ISD::SADDO : ISD::UADDO, DL,
 8468     if (!LegalOperations && TLI.isOperationLegalOrCustom(ISD::UADDO, VT) &&
 8487         SDValue UAO = DAG.getNode(ISD::UADDO, DL, VTs, Cond0, N2.getOperand(1));

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 3393   case ISD::UADDO:

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

  141   case ISD::UADDO:
  979   unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB;
 1781   case ISD::UADDO:
 2143       Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps);
 2180                                    ISD::UADDO : ISD::USUBO,
 2190       Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps);
 2309     case ISD::UADDO:
 3408     SDValue Five = DAG.getNode(ISD::UADDO, dl, VTFullAddO, Three, Four);

lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

  442   case ISD::UADDO:
  817   case ISD::UADDO:

lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

  178   case ISD::UADDO:
  993   case ISD::UADDO:
 2804   case ISD::UADDO:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 3052   case ISD::UADDO:
 3637   case ISD::UADDO:
 9182   assert((Opcode == ISD::UADDO || Opcode == ISD::SADDO ||

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 6523     case Intrinsic::uadd_with_overflow: Op = ISD::UADDO; break;

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  289   case ISD::UADDO:                      return "uaddo";

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 6910     OverflowOp = ISD::UADDO;
 7107   bool IsAdd = Node->getOpcode() == ISD::UADDO;

lib/CodeGen/TargetLoweringBase.cpp

  661     setOperationAction(ISD::UADDO, VT, Expand);

lib/Target/AArch64/AArch64ISelLowering.cpp

  338   setOperationAction(ISD::UADDO, MVT::i32, Custom);
  339   setOperationAction(ISD::UADDO, MVT::i64, Custom);
 2117   case ISD::UADDO:
 2228           (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
 3002   case ISD::UADDO:

lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

  756   case ISD::UADDO:
 1059   unsigned Opc = N->getOpcode() == ISD::UADDO ?

lib/Target/AMDGPU/R600ISelLowering.cpp

  175     setOperationAction(ISD::UADDO, MVT::i32, Custom);
  483   case ISD::UADDO: return LowerUADDSUBO(Op, DAG, ISD::ADD, AMDGPUISD::CARRY);

lib/Target/AMDGPU/SIISelLowering.cpp

  232   setOperationAction(ISD::UADDO, MVT::i32, Legal);

lib/Target/ARM/ARMISelLowering.cpp

 1018   setOperationAction(ISD::UADDO, MVT::i32, Custom);
 4381   case ISD::UADDO:
 4492   case ISD::UADDO:
 4549       (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
 5184       (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
 5235       (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
 9214   case ISD::UADDO:
16182       !isOperationLegalOrCustom(ISD::UADDO, HalfT))
16196   Lo = DAG.getNode(ISD::UADDO, dl, VTList, Tmp, Lo);

lib/Target/Hexagon/HexagonISelLowering.cpp

 1342     setOperationAction(ISD::UADDO,    VT, Custom);
 1422     ISD::UADDO,   ISD::SSUBO,   ISD::USUBO,   ISD::SMUL_LOHI, ISD::UMUL_LOHI,
 2760     if (Opc == ISD::UADDO) {
 2854     case ISD::UADDO:

lib/Target/SystemZ/SystemZISelLowering.cpp

  171       setOperationAction(ISD::UADDO, VT, Custom);
 3458   case ISD::UADDO:
 3483   return Carry.getOpcode() == ISD::UADDO;
 4968   case ISD::UADDO:

lib/Target/X86/X86ISelLowering.cpp

 1788     setOperationAction(ISD::UADDO, VT, Custom);
21129   case ISD::UADDO:
21428              CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO ||
21980          Cond.getOperand(0).getOpcode() == ISD::UADDO ||
22034   if (CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO ||
27755   case ISD::UADDO:
27913     Lo = DAG.getNode(ISD::UADDO, dl, VTList, Tmp, Lo);

lib/Target/X86/X86TargetTransformInfo.cpp

 2127     { ISD::UADDO,      MVT::i64,     1 },
 2142     { ISD::UADDO,      MVT::i32,     1 },
 2143     { ISD::UADDO,      MVT::i16,     1 },
 2144     { ISD::UADDO,      MVT::i8,      1 },
 2191     ISD = ISD::UADDO;