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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc114582 case 22: return (!MF->getFunction().hasOptNone() || MF->getProperties().hasProperty(MachineFunctionProperties::Property::FailedISel) || !MF->getProperties().hasProperty(MachineFunctionProperties::Property::Legalized));
114582 case 22: return (!MF->getFunction().hasOptNone() || MF->getProperties().hasProperty(MachineFunctionProperties::Property::FailedISel) || !MF->getProperties().hasProperty(MachineFunctionProperties::Property::Legalized));
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 120 if (!MF->getFunction().hasOptNone() || MF->getProperties().hasProperty(MachineFunctionProperties::Property::FailedISel) || !MF->getProperties().hasProperty(MachineFunctionProperties::Property::Legalized))
120 if (!MF->getFunction().hasOptNone() || MF->getProperties().hasProperty(MachineFunctionProperties::Property::FailedISel) || !MF->getProperties().hasProperty(MachineFunctionProperties::Property::Legalized))
include/llvm/CodeGen/ExecutionDomainFix.h 143 MachineFunctionProperties::Property::NoVRegs);
include/llvm/CodeGen/GlobalISel/InstructionSelect.h 36 .set(MachineFunctionProperties::Property::IsSSA)
37 .set(MachineFunctionProperties::Property::Legalized)
38 .set(MachineFunctionProperties::Property::RegBankSelected);
43 MachineFunctionProperties::Property::Selected);
include/llvm/CodeGen/GlobalISel/Legalizer.h 49 MachineFunctionProperties::Property::IsSSA);
54 MachineFunctionProperties::Property::Legalized);
59 .set(MachineFunctionProperties::Property::NoPHIs);
include/llvm/CodeGen/GlobalISel/Localizer.h 80 .set(MachineFunctionProperties::Property::IsSSA)
81 .set(MachineFunctionProperties::Property::Legalized)
82 .set(MachineFunctionProperties::Property::RegBankSelected);
include/llvm/CodeGen/GlobalISel/RegBankSelect.h 627 .set(MachineFunctionProperties::Property::IsSSA)
628 .set(MachineFunctionProperties::Property::Legalized);
633 MachineFunctionProperties::Property::RegBankSelected);
638 .set(MachineFunctionProperties::Property::NoPHIs);
include/llvm/CodeGen/MachineFunction.h 158 bool hasProperty(Property P) const {
162 MachineFunctionProperties &set(Property P) {
167 MachineFunctionProperties &reset(Property P) {
199 BitVector(static_cast<unsigned>(Property::LastProperty)+1);
include/llvm/CodeGen/MachineRegisterInfo.h 187 MachineFunctionProperties::Property::IsSSA);
192 MF->getProperties().reset(MachineFunctionProperties::Property::IsSSA);
199 MachineFunctionProperties::Property::TracksLiveness);
209 MachineFunctionProperties::Property::TracksLiveness);
include/llvm/CodeGen/ReachingDefAnalysis.h 89 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/BreakFalseDeps.cpp 65 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/FuncletLayout.cpp 32 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/GlobalISel/Combiner.cpp 103 MachineFunctionProperties::Property::FailedISel))
lib/CodeGen/GlobalISel/IRTranslator.cpp 99 MF.getProperties().set(MachineFunctionProperties::Property::FailedISel);
lib/CodeGen/GlobalISel/InstructionSelect.cpp 69 MachineFunctionProperties::Property::FailedISel))
lib/CodeGen/GlobalISel/Legalizer.cpp 145 MachineFunctionProperties::Property::FailedISel))
lib/CodeGen/GlobalISel/Localizer.cpp 211 MachineFunctionProperties::Property::FailedISel))
lib/CodeGen/GlobalISel/RegBankSelect.cpp 654 MachineFunctionProperties::Property::FailedISel))
lib/CodeGen/GlobalISel/Utils.cpp 181 MF.getProperties().set(MachineFunctionProperties::Property::FailedISel);
lib/CodeGen/IfConversion.cpp 221 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/ImplicitNullChecks.cpp 225 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/LiveDebugValues.cpp 519 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/MIRParser/MIRParser.cpp 330 Properties.set(MachineFunctionProperties::Property::NoPHIs);
334 Properties.set(MachineFunctionProperties::Property::IsSSA);
336 Properties.reset(MachineFunctionProperties::Property::IsSSA);
340 Properties.set(MachineFunctionProperties::Property::NoVRegs);
401 MF.getProperties().set(MachineFunctionProperties::Property::Legalized);
404 MachineFunctionProperties::Property::RegBankSelected);
406 MF.getProperties().set(MachineFunctionProperties::Property::Selected);
408 MF.getProperties().set(MachineFunctionProperties::Property::FailedISel);
lib/CodeGen/MIRPrinter.cpp 205 MachineFunctionProperties::Property::Legalized);
207 MachineFunctionProperties::Property::RegBankSelected);
209 MachineFunctionProperties::Property::Selected);
211 MachineFunctionProperties::Property::FailedISel);
lib/CodeGen/MachineCopyPropagation.cpp 204 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/MachineFunction.cpp 87 static const char *getPropertyName(MachineFunctionProperties::Property Prop) {
88 using P = MachineFunctionProperties::Property;
155 Properties.set(MachineFunctionProperties::Property::IsSSA);
156 Properties.set(MachineFunctionProperties::Property::TracksLiveness);
lib/CodeGen/MachineOutliner.cpp 1151 MF.getProperties().reset(MachineFunctionProperties::Property::TracksLiveness);
1242 MachineFunctionProperties::Property::TracksLiveness)) {
lib/CodeGen/MachineSink.cpp 1069 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/MachineVerifier.cpp 355 MachineFunctionProperties::Property::NoVRegs) &&
370 MachineFunctionProperties::Property::FailedISel);
381 MachineFunctionProperties::Property::RegBankSelected);
384 MachineFunctionProperties::Property::Selected);
622 MachineFunctionProperties::Property::NoPHIs) && MRI->tracksLiveness()) {
1490 MachineFunctionProperties::Property::NoPHIs))
lib/CodeGen/PHIElimination.cpp 197 MF.getProperties().set(MachineFunctionProperties::Property::NoPHIs);
lib/CodeGen/PatchableFunction.cpp 34 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/PostRASchedulerList.cpp 100 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/RegAllocBasic.cpp 111 MachineFunctionProperties::Property::NoPHIs);
lib/CodeGen/RegAllocFast.cpp 172 MachineFunctionProperties::Property::NoPHIs);
177 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/RegAllocGreedy.cpp 434 MachineFunctionProperties::Property::NoPHIs);
lib/CodeGen/RegAllocPBQP.cpp 140 MachineFunctionProperties::Property::NoPHIs);
lib/CodeGen/RegisterScavenging.cpp 758 MF.getProperties().set(MachineFunctionProperties::Property::NoVRegs);
780 MF.getProperties().set(MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/ResetMachineFunctionPass.cpp 62 MachineFunctionProperties::Property::FailedISel)) {
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 414 MachineFunctionProperties::Property::Selected))
lib/CodeGen/ShrinkWrap.cpp 235 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/StackMapLivenessAnalysis.cpp 65 MachineFunctionProperties::Property::NoVRegs);
lib/CodeGen/VirtRegMap.cpp 203 MachineFunctionProperties::Property::NoVRegs);
lib/Target/AArch64/AArch64A53Fix835769.cpp 92 MachineFunctionProperties::Property::NoVRegs);
lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp 124 MachineFunctionProperties::Property::NoVRegs);
lib/Target/AArch64/AArch64CollectLOH.cpp 142 MachineFunctionProperties::Property::NoVRegs);
lib/Target/AArch64/AArch64CompressJumpTables.cpp 54 MachineFunctionProperties::Property::NoVRegs);
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 199 MachineFunctionProperties::Property::NoVRegs);
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp 179 MachineFunctionProperties::Property::NoVRegs);
lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp 145 MachineFunctionProperties::Property::FailedISel))
lib/Target/AArch64/AArch64RedundantCopyElimination.cpp 100 MachineFunctionProperties::Property::NoVRegs);
lib/Target/AMDGPU/SIShrinkInstructions.cpp 696 MachineFunctionProperties::Property::NoVRegs)) {
lib/Target/ARM/ARMConstantIslandPass.cpp 238 MachineFunctionProperties::Property::NoVRegs);
lib/Target/ARM/ARMExpandPseudoInsts.cpp 53 MachineFunctionProperties::Property::NoVRegs);
lib/Target/ARM/ARMLoadStoreOptimizer.cpp 121 MachineFunctionProperties::Property::NoVRegs);
lib/Target/ARM/ARMLowOverheadLoops.cpp 57 MachineFunctionProperties::Property::NoVRegs);
98 MF->getProperties().set(MachineFunctionProperties::Property::TracksLiveness);
lib/Target/ARM/ARMOptimizeBarriersPass.cpp 31 MachineFunctionProperties::Property::NoVRegs);
lib/Target/ARM/MVEVPTBlockPass.cpp 49 MachineFunctionProperties::Property::NoVRegs);
lib/Target/ARM/Thumb1FrameLowering.cpp 452 MF.getProperties().reset(MachineFunctionProperties::Property::NoVRegs);
lib/Target/ARM/Thumb2ITBlockPass.cpp 58 MachineFunctionProperties::Property::NoVRegs);
lib/Target/ARM/Thumb2SizeReduction.cpp 172 MachineFunctionProperties::Property::NoVRegs);
lib/Target/AVR/AVRExpandPseudoInsts.cpp 118 MF.getProperties().set(MachineFunctionProperties::Property::TracksLiveness);
lib/Target/Hexagon/HexagonCFGOptimizer.cpp 53 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Hexagon/HexagonCopyToCombine.cpp 87 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Hexagon/HexagonFixupHwLoops.cpp 49 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Hexagon/HexagonFrameLowering.cpp 216 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Hexagon/HexagonGenMux.cpp 84 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Hexagon/HexagonNewValueJump.cpp 91 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Hexagon/HexagonRDFOpt.cpp 74 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp 51 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Hexagon/HexagonVLIWPacketizer.cpp 110 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Lanai/LanaiDelaySlotFiller.cpp 62 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Lanai/LanaiMemAluCombiner.cpp 71 MachineFunctionProperties::Property::NoVRegs);
lib/Target/MSP430/MSP430BranchSelector.cpp 57 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Mips/MipsBranchExpansion.cpp 150 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Mips/MipsConstantIslandPass.cpp 369 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Mips/MipsDelaySlotFiller.cpp 238 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Mips/MipsExpandPseudo.cpp 45 MachineFunctionProperties::Property::NoVRegs);
lib/Target/Mips/MipsPreLegalizerCombiner.cpp 82 MachineFunctionProperties::Property::FailedISel))
lib/Target/PowerPC/PPCBranchSelector.cpp 62 MachineFunctionProperties::Property::NoVRegs);
lib/Target/PowerPC/PPCEarlyReturn.cpp 194 MachineFunctionProperties::Property::NoVRegs);
lib/Target/PowerPC/PPCPreEmitPeephole.cpp 59 MachineFunctionProperties::Property::NoVRegs);
lib/Target/RISCV/RISCVISelLowering.cpp 1345 F->getProperties().reset(MachineFunctionProperties::Property::NoPHIs);
lib/Target/RISCV/RISCVMergeBaseOffset.cpp 53 MachineFunctionProperties::Property::IsSSA);
lib/Target/Sparc/DelaySlotFiller.cpp 64 MachineFunctionProperties::Property::NoVRegs);
lib/Target/SystemZ/SystemZElimCompare.cpp 79 MachineFunctionProperties::Property::NoVRegs);
lib/Target/SystemZ/SystemZISelLowering.cpp 6614 MF->getProperties().reset(MachineFunctionProperties::Property::NoPHIs);
lib/Target/SystemZ/SystemZLongBranch.cpp 147 MachineFunctionProperties::Property::NoVRegs);
lib/Target/SystemZ/SystemZShortenInst.cpp 39 MachineFunctionProperties::Property::NoVRegs);
lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp 124 MF.getProperties().set(MachineFunctionProperties::Property::TracksLiveness);
lib/Target/X86/X86EvexToVex.cpp 82 MachineFunctionProperties::Property::NoVRegs);
lib/Target/X86/X86ExpandPseudo.cpp 54 MachineFunctionProperties::Property::NoVRegs);
lib/Target/X86/X86FixupBWInsts.cpp 126 MachineFunctionProperties::Property::NoVRegs);
lib/Target/X86/X86FixupLEAs.cpp 111 MachineFunctionProperties::Property::NoVRegs);
lib/Target/X86/X86FloatingPoint.cpp 80 MachineFunctionProperties::Property::NoVRegs);
lib/Target/X86/X86PadShortFunction.cpp 57 MachineFunctionProperties::Property::NoVRegs);
lib/Target/X86/X86RetpolineThunks.cpp 240 MF.getProperties().set(MachineFunctionProperties::Property::NoVRegs);
lib/Target/X86/X86VZeroUpper.cpp 54 MachineFunctionProperties::Property::NoVRegs);
lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp 31 MachineFunctionProperties::Property::NoVRegs);
tools/llvm-exegesis/lib/Assembler.cpp 186 Properties.set(MachineFunctionProperties::Property::NoVRegs);
187 Properties.reset(MachineFunctionProperties::Property::IsSSA);
188 Properties.set(MachineFunctionProperties::Property::NoPHIs);
208 Properties.reset(MachineFunctionProperties::Property::TracksLiveness);