reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/MachineRegisterInfo.h

  460     return make_range(use_begin(Reg), use_end());
  496   bool use_empty(unsigned RegNo) const { return use_begin(RegNo) == use_end(); }
  501     use_iterator UI = use_begin(RegNo);

lib/CodeGen/GlobalISel/Localizer.cpp

  128     for (auto MOIt = MRI->use_begin(Reg), MOItEnd = MRI->use_end();

lib/CodeGen/MIRCanonicalizerPass.cpp

  341     for (auto UI = MRI.use_begin(Dst); UI != MRI.use_end(); ++UI)

lib/CodeGen/MIRVRegNamerUtils.cpp

   64       for (auto UI = MRI.use_begin(Dst); UI != MRI.use_end(); ++UI) {

lib/CodeGen/ModuloSchedule.cpp

   84       for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(Reg),
  337   for (MachineRegisterInfo::use_iterator I = MRI.use_begin(FromReg),
  353   for (MachineRegisterInfo::use_iterator I = MRI.use_begin(Reg),
  738         for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(reg),
  768     if (MRI.use_begin(reg) == MRI.use_end()) {
 1143   for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(OldReg),

lib/CodeGen/RegisterCoalescer.cpp

  859   for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(IntA.reg),

lib/CodeGen/TailDuplicator.cpp

  209       MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);

lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp

 1613       for (auto UI = MRI->use_begin(Reg), E = MRI->use_end(); UI != E; ++UI) {
 1896   for (auto UI = MRI->use_begin(CondReg), E = MRI->use_end(); UI != E; ++UI) {

lib/Target/AMDGPU/SIFoldOperands.cpp

  567            RSUse = MRI->use_begin(RegSeqDstReg), RSE = MRI->use_end();
  630           Use = MRI->use_begin(DestReg), E = MRI->use_end();
 1130            Use = MRI->use_begin(Dst.getReg()), E = MRI->use_end();
 1152         NextUse = MRI->use_begin(Dst.getReg());
 1193            Use = MRI->use_begin(Dst.getReg()), E = MRI->use_end();

lib/Target/AMDGPU/SIInstrInfo.cpp

 5620   for (MachineRegisterInfo::use_iterator I = MRI.use_begin(DstReg),

lib/Target/ARM/A15SDOptimizer.cpp

  626       for (MachineRegisterInfo::use_iterator I = MRI->use_begin(DPRDefReg),

lib/Target/BPF/BPFMISimplifyPatchable.cpp

  131         auto Begin = MRI->use_begin(DstReg), End = MRI->use_end();

lib/Target/Hexagon/HexagonBitSimplify.cpp

  358   auto Begin = MRI.use_begin(OldR), End = MRI.use_end();
  373   auto Begin = MRI.use_begin(OldR), End = MRI.use_end();
  389   auto Begin = MRI.use_begin(OldR), End = MRI.use_end();
  973   for (auto I = MRI.use_begin(R), E = MRI.use_end(); I != E; ++I) {
 1213     for (auto I = MRI.use_begin(R), E = MRI.use_end(); I != E; ++I) {
 3115     for (auto UI = MRI->use_begin(PR), UE = MRI->use_end(); UI != UE; ++UI) {
 3168     for (auto UI = MRI->use_begin(DefR), UE = MRI->use_end(); UI != UE; ++UI) {

lib/Target/Hexagon/HexagonConstPropagation.cpp

 3116   for (auto I = MRI->use_begin(FromReg), E = MRI->use_end(); I != E;) {

lib/Target/Hexagon/HexagonEarlyIfConv.cpp

  392       for (auto U = MRI->use_begin(R); U != MRI->use_end(); ++U)

lib/Target/Hexagon/HexagonGenPredicate.cpp

  229   use_iterator I = MRI->use_begin(Reg.R), E = MRI->use_end();

lib/Target/Hexagon/HexagonHardwareLoops.cpp

 1097       for (MachineRegisterInfo::use_iterator I = MRI->use_begin(Reg),

lib/Target/Mips/MipsSEISelDAGToDAG.cpp

  105   for (MachineRegisterInfo::use_iterator U = MRI->use_begin(DstReg),

lib/Target/RISCV/RISCVMergeBaseOffset.cpp

   89   LoADDI = MRI->use_begin(HiLuiDestReg)->getParent();
  184   MachineInstr &Tail = *MRI->use_begin(DestReg)->getParent();

lib/Target/X86/X86OptimizeLEAs.cpp

  620         for (auto UI = MRI->use_begin(LastVReg), UE = MRI->use_end();