reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
9420 if (N0.getOpcode() == ISD::SIGN_EXTEND || N0.getOpcode() == ISD::ANY_EXTEND) 9420 if (N0.getOpcode() == ISD::SIGN_EXTEND || N0.getOpcode() == ISD::ANY_EXTEND) 9421 return DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N0.getOperand(0)); 9423 if (N0.getOpcode() == ISD::TRUNCATE) { 9426 if (SDValue NarrowLoad = ReduceLoadWidth(N0.getNode())) { 9427 SDNode *oye = N0.getOperand(0).getNode(); 9428 if (NarrowLoad.getNode() != N0.getNode()) { 9429 CombineTo(N0.getNode(), NarrowLoad); 9438 SDValue Op = N0.getOperand(0); 9440 unsigned MidBits = N0.getScalarValueSizeInBits(); 9463 N0.getValueType())) { 9465 Op = DAG.getNode(ISD::ANY_EXTEND, SDLoc(N0), VT, Op); 9467 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N0), VT, Op); 9469 DAG.getValueType(N0.getValueType())); 9475 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, 9480 tryToFoldExtOfMaskedLoad(DAG, TLI, VT, N, N0, ISD::SEXTLOAD, 9491 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::SEXTLOAD)) 9496 if ((N0.getOpcode() == ISD::AND || N0.getOpcode() == ISD::OR || 9496 if ((N0.getOpcode() == ISD::AND || N0.getOpcode() == ISD::OR || 9497 N0.getOpcode() == ISD::XOR) && 9498 isa<LoadSDNode>(N0.getOperand(0)) && 9499 N0.getOperand(1).getOpcode() == ISD::Constant && 9500 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) { 9501 LoadSDNode *LN00 = cast<LoadSDNode>(N0.getOperand(0)); 9506 bool DoXform = ExtendUsesToFormExtLoad(VT, N0.getNode(), N0.getOperand(0), 9506 bool DoXform = ExtendUsesToFormExtLoad(VT, N0.getNode(), N0.getOperand(0), 9513 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); 9515 SDValue And = DAG.getNode(N0.getOpcode(), DL, VT, 9517 ExtendSetCCUses(SetCCs, N0.getOperand(0), ExtLoad, ISD::SIGN_EXTEND); 9518 bool NoReplaceTruncAnd = !N0.hasOneUse(); 9524 DAG.getNode(ISD::TRUNCATE, DL, N0.getValueType(), And); 9525 CombineTo(N0.getNode(), TruncAnd); 9542 if (N0.getOpcode() == ISD::SETCC) { 9543 SDValue N00 = N0.getOperand(0); 9544 SDValue N01 = N0.getOperand(1); 9545 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get(); 9546 EVT N00VT = N0.getOperand(0).getValueType(); 9559 if (SVT != N0.getValueType()) { 9582 unsigned SetCCWidth = N0.getScalarValueSizeInBits(); 9615 DAG.SignBitIsZero(N0)) 9616 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0); 9623 if (N0.getOpcode() == ISD::SUB && N0.hasOneUse() && 9623 if (N0.getOpcode() == ISD::SUB && N0.hasOneUse() && 9624 isNullOrNullSplat(N0.getOperand(0)) && 9625 N0.getOperand(1).getOpcode() == ISD::ZERO_EXTEND && 9627 SDValue Zext = DAG.getZExtOrTrunc(N0.getOperand(1).getOperand(0), DL, VT); 9632 if (N0.getOpcode() == ISD::ADD && N0.hasOneUse() && 9632 if (N0.getOpcode() == ISD::ADD && N0.hasOneUse() && 9633 isAllOnesOrAllOnesSplat(N0.getOperand(1)) && 9634 N0.getOperand(0).getOpcode() == ISD::ZERO_EXTEND && 9636 SDValue Zext = DAG.getZExtOrTrunc(N0.getOperand(0).getOperand(0), DL, VT);