reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
  354   switch (MI.getOpcode()) {
  420   if (!shouldReplaceInst(MI.getParent()->getParent(), &TII->get(MI.getOpcode()),
  420   if (!shouldReplaceInst(MI.getParent()->getParent(), &TII->get(MI.getOpcode()),
  424   const DebugLoc &DL = MI.getDebugLoc();
  425   MachineBasicBlock &MBB = *MI.getParent();
  429   Register MulDest = MI.getOperand(0).getReg();
  430   Register SrcReg0 = MI.getOperand(1).getReg();
  431   unsigned Src0IsKill = getKillRegState(MI.getOperand(1).isKill());
  432   Register SrcReg1 = MI.getOperand(2).getReg();
  433   unsigned Src1IsKill = getKillRegState(MI.getOperand(2).isKill());
  437   if (MI.getNumOperands() == 5) {
  438     Register SrcReg2 = MI.getOperand(3).getReg();
  439     unsigned Src2IsKill = getKillRegState(MI.getOperand(3).isKill());
  440     unsigned LaneNumber = MI.getOperand(4).getImm();
  444     if (!reuseDUP(MI, DupMCID->getOpcode(), SrcReg2, LaneNumber, &DupDest)) {
  446       BuildMI(MBB, MI, DL, *DupMCID, DupDest)
  450     BuildMI(MBB, MI, DL, *MulMCID, MulDest)
  454   } else if (MI.getNumOperands() == 4) {
  455     unsigned LaneNumber = MI.getOperand(3).getImm();
  456     if (!reuseDUP(MI, DupMCID->getOpcode(), SrcReg1, LaneNumber, &DupDest)) {
  458       BuildMI(MBB, MI, DL, *DupMCID, DupDest)
  462     BuildMI(MBB, MI, DL, *MulMCID, MulDest)