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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc75007 /*166156*/ /*SwitchOpcode*/ 84, TARGET_VAL(AMDGPUISD::RCP),// ->166243
gen/lib/Target/AMDGPU/R600GenDAGISel.inc 9375 /* 35773*/ /*SwitchOpcode*/ 39|128,3/*423*/, TARGET_VAL(AMDGPUISD::RCP),// ->36200
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 530 case AMDGPUISD::RCP:
1579 fa, DAG.getNode(AMDGPUISD::RCP, DL, FltVT, fb));
1679 SDValue Rcp = DAG.getNode(AMDGPUISD::RCP, DL, MVT::f32, Mad1);
3779 case AMDGPUISD::RCP:
4070 case AMDGPUISD::RCP:
4238 NODE_NAME_CASE(RCP)
4384 return DAG.getNode(AMDGPUISD::RCP, SDLoc(Operand), VT, Operand);
4615 case AMDGPUISD::RCP:
lib/Target/AMDGPU/SIISelLowering.cpp 5750 return DAG.getNode(AMDGPUISD::RCP, DL, VT, Op.getOperand(1));
7546 return DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS);
7553 return DAG.getNode(AMDGPUISD::RCP, SL, VT, FNegRHS);
7561 SDValue Recip = DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS);
7620 SDValue RcpSrc1 = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f32, CvtSrc1);
7656 SDValue r0 = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f32, r1);
7694 SDValue ApproxRcp = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f32,
7795 SDValue Rcp = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f64, DivScale0);
8604 case AMDGPUISD::RCP:
8747 case AMDGPUISD::RCP:
10009 case AMDGPUISD::RCP: