reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1854 SDLoc DL(N); 1856 switch (N->getOpcode()) { 1859 SDValue Arg = N->getOperand(0); 1861 return DAG.getNode(ISD::UINT_TO_FP, DL, N->getValueType(0), 1873 SDValue FNeg = N->getOperand(0); 1886 return DAG.getNode(ISD::SELECT_CC, DL, N->getValueType(0), 1899 SDValue InVec = N->getOperand(0); 1900 SDValue InVal = N->getOperand(1); 1901 SDValue EltNo = N->getOperand(2); 1951 SDValue Arg = N->getOperand(0); 1953 if (ConstantSDNode *Const = dyn_cast<ConstantSDNode>(N->getOperand(1))) { 1962 if (ConstantSDNode *Const = dyn_cast<ConstantSDNode>(N->getOperand(1))) { 1964 return DAG.getNode(ISD::BITCAST, DL, N->getVTList(), 1973 if (SDValue Ret = AMDGPUTargetLowering::PerformDAGCombine(N, DCI)) 1981 SDValue LHS = N->getOperand(0); 1986 SDValue RHS = N->getOperand(1); 1987 SDValue True = N->getOperand(2); 1988 SDValue False = N->getOperand(3); 1989 ISD::CondCode NCC = cast<CondCodeSDNode>(N->getOperand(4))->get(); 2019 SDValue Arg = N->getOperand(1); 2024 N->getOperand(0), // Chain 2026 N->getOperand(2), // ArrayBase 2027 N->getOperand(3), // Type 2028 N->getOperand(4), // SWZ_X 2029 N->getOperand(5), // SWZ_Y 2030 N->getOperand(6), // SWZ_Z 2031 N->getOperand(7) // SWZ_W 2033 NewArgs[1] = OptimizeSwizzle(N->getOperand(1), &NewArgs[4], DAG, DL); 2034 return DAG.getNode(AMDGPUISD::R600_EXPORT, DL, N->getVTList(), NewArgs); 2037 SDValue Arg = N->getOperand(1); 2042 N->getOperand(0), 2043 N->getOperand(1), 2044 N->getOperand(2), 2045 N->getOperand(3), 2046 N->getOperand(4), 2047 N->getOperand(5), 2048 N->getOperand(6), 2049 N->getOperand(7), 2050 N->getOperand(8), 2051 N->getOperand(9), 2052 N->getOperand(10), 2053 N->getOperand(11), 2054 N->getOperand(12), 2055 N->getOperand(13), 2056 N->getOperand(14), 2057 N->getOperand(15), 2058 N->getOperand(16), 2059 N->getOperand(17), 2060 N->getOperand(18), 2062 NewArgs[1] = OptimizeSwizzle(N->getOperand(1), &NewArgs[2], DAG, DL); 2063 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, DL, N->getVTList(), NewArgs); 2067 LoadSDNode *LoadNode = cast<LoadSDNode>(N); 2078 return AMDGPUTargetLowering::PerformDAGCombine(N, DCI);