reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1372 MachineBasicBlock &MBB = *MI.getParent(); 1373 DebugLoc DL = MBB.findDebugLoc(MI); 1374 switch (MI.getOpcode()) { 1375 default: return TargetInstrInfo::expandPostRAPseudo(MI); 1379 MI.setDesc(get(AMDGPU::S_MOV_B64)); 1385 MI.setDesc(get(AMDGPU::S_MOV_B32)); 1391 MI.setDesc(get(AMDGPU::S_XOR_B64)); 1397 MI.setDesc(get(AMDGPU::S_XOR_B32)); 1403 MI.setDesc(get(AMDGPU::S_OR_B32)); 1409 MI.setDesc(get(AMDGPU::S_ANDN2_B64)); 1415 MI.setDesc(get(AMDGPU::S_ANDN2_B32)); 1419 Register Dst = MI.getOperand(0).getReg(); 1423 const MachineOperand &SrcOp = MI.getOperand(1); 1428 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstLo) 1431 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstHi) 1436 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstLo) 1439 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstHi) 1443 MI.eraseFromParent(); 1447 expandMovDPP64(MI); 1453 BuildMI(MBB, MI, DL, get(NotOpc), Exec) 1455 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), MI.getOperand(0).getReg()) 1455 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), MI.getOperand(0).getReg()) 1456 .add(MI.getOperand(2)); 1457 BuildMI(MBB, MI, DL, get(NotOpc), Exec) 1459 MI.eraseFromParent(); 1465 BuildMI(MBB, MI, DL, get(NotOpc), Exec) 1467 MachineInstr *Copy = BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B64_PSEUDO), 1468 MI.getOperand(0).getReg()) 1469 .add(MI.getOperand(2)); 1471 BuildMI(MBB, MI, DL, get(NotOpc), Exec) 1473 MI.eraseFromParent(); 1482 Register VecReg = MI.getOperand(0).getReg(); 1483 bool IsUndef = MI.getOperand(1).isUndef(); 1484 unsigned SubReg = AMDGPU::sub0 + MI.getOperand(3).getImm(); 1485 assert(VecReg == MI.getOperand(1).getReg()); 1488 BuildMI(MBB, MI, DL, MovRelDesc) 1490 .add(MI.getOperand(2)) 1500 MI.eraseFromParent(); 1505 Register Reg = MI.getOperand(0).getReg(); 1511 MIBundleBuilder Bundler(MBB, MI); 1518 .add(MI.getOperand(1))); 1522 MIB.add(MI.getOperand(2)); 1527 MI.eraseFromParent(); 1533 MI.setDesc(get(ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32 1540 MI.setDesc(get(ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64)); 1544 if (!MI.mayLoad() || MI.hasUnmodeledSideEffects()) 1544 if (!MI.mayLoad() || MI.hasUnmodeledSideEffects()) 1548 for (MachineBasicBlock::instr_iterator I = MI.getIterator(); 1556 MI.eraseFromParent();