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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
lib/Target/AMDGPU/SIInstrInfo.h 907 MachineOperand *getNamedOperand(MachineInstr &MI, unsigned OperandName) const;
References
lib/Target/AMDGPU/GCNDPPCombine.cpp 171 auto *Dst = TII->getNamedOperand(OrigMI, AMDGPU::OpName::vdst);
192 if (auto *Mod0 = TII->getNamedOperand(OrigMI,
204 auto *Src0 = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0);
215 if (auto *Mod1 = TII->getNamedOperand(OrigMI,
227 if (auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1)) {
237 if (auto *Src2 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src2)) {
238 if (!TII->getNamedOperand(*DPPInst.getInstr(), AMDGPU::OpName::src2) ||
247 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::dpp_ctrl));
248 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask));
249 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask));
320 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1);
342 auto *Imm = TII->getNamedOperand(MI, OpndName);
354 auto *DstOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst);
367 auto *RowMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask);
369 auto *BankMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask);
374 auto *BCZOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bound_ctrl);
378 auto *OldOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::old);
379 auto *SrcOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0);
507 if (Use == TII->getNamedOperand(OrigMI, AMDGPU::OpName::src0)) {
514 Use == TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1)) {
lib/Target/AMDGPU/GCNHazardRecognizer.cpp 790 TII->getNamedOperand(*RWLane, AMDGPU::OpName::src1);
893 auto *Src0 = TII->getNamedOperand(*MI, AMDGPU::OpName::src0);
967 const MachineOperand *SDST = TII->getNamedOperand(*MI, SDSTName);
1052 if (TII->getNamedOperand(*MI, AMDGPU::OpName::sdst))
1146 const auto *Offset = TII->getNamedOperand(*MI, AMDGPU::OpName::offset);
1341 Register Reg = TII.getNamedOperand(*MI, AMDGPU::OpName::src2)->getReg();
lib/Target/AMDGPU/SIAddIMGInit.cpp 79 MachineOperand *TFE = TII->getNamedOperand(MI, AMDGPU::OpName::tfe);
80 MachineOperand *LWE = TII->getNamedOperand(MI, AMDGPU::OpName::lwe);
81 MachineOperand *D16 = TII->getNamedOperand(MI, AMDGPU::OpName::d16);
103 TII->getNamedOperand(MI, AMDGPU::OpName::dmask);
lib/Target/AMDGPU/SIFixupVectorISel.cpp 177 MachineOperand *Op = TII->getNamedOperand(MI, AMDGPU::OpName::vaddr);
183 bool HasVdst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst) != nullptr;
184 MachineOperand *VData = TII->getNamedOperand(MI, AMDGPU::OpName::vdata);
193 NewGlob->addOperand(*TII->getNamedOperand(MI, AMDGPU::OpName::offset));
195 MachineOperand *Glc = TII->getNamedOperand(MI, AMDGPU::OpName::glc);
200 MachineOperand *DLC = TII->getNamedOperand(MI, AMDGPU::OpName::dlc);
204 NewGlob->addOperand(*TII->getNamedOperand(MI, AMDGPU::OpName::slc));
206 MachineOperand *VDstInOp = TII->getNamedOperand(MI,
lib/Target/AMDGPU/SIFoldOperands.cpp 593 MachineOperand *SOff = TII->getNamedOperand(*UseMI, AMDGPU::OpName::soffset);
598 if (TII->getNamedOperand(*UseMI, AMDGPU::OpName::srsrc)->getReg() !=
992 bool UseCopy = TII->getNamedOperand(*MI, AMDGPU::OpName::src2)->isReg();
1086 const MachineOperand *Src0 = TII->getNamedOperand(*MI, AMDGPU::OpName::src0);
1087 const MachineOperand *Src1 = TII->getNamedOperand(*MI, AMDGPU::OpName::src1);
1306 MachineOperand *DefClamp = TII->getNamedOperand(*Def, AMDGPU::OpName::clamp);
1425 MachineOperand *DefOMod = TII->getNamedOperand(*Def, AMDGPU::OpName::omod);
lib/Target/AMDGPU/SIISelLowering.cpp 3126 if (MachineOperand *Src = TII->getNamedOperand(MI, AMDGPU::OpName::data0))
3302 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx);
3342 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx);
3398 Register SrcReg = TII->getNamedOperand(MI, AMDGPU::OpName::src)->getReg();
3399 int Offset = TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm();
3489 const MachineOperand *SrcVec = TII->getNamedOperand(MI, AMDGPU::OpName::src);
3490 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx);
3491 const MachineOperand *Val = TII->getNamedOperand(MI, AMDGPU::OpName::val);
3492 int Offset = TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm();
lib/Target/AMDGPU/SIInsertWaitcnts.cpp 1272 int Imm = TII->getNamedOperand(Inst, AMDGPU::OpName::tgt)->getImm();
lib/Target/AMDGPU/SIInstrInfo.cpp 1626 MachineOperand *Src0Mods = getNamedOperand(MI, Src0OpName);
1630 MachineOperand *Src1Mods = getNamedOperand(MI, Src1OpName);
2325 const MachineOperand *ImmOp = getNamedOperand(DefMI, AMDGPU::OpName::src0);
2358 MachineOperand *Src0 = getNamedOperand(UseMI, AMDGPU::OpName::src0);
2368 MachineOperand *Src1 = getNamedOperand(UseMI, AMDGPU::OpName::src1);
2369 MachineOperand *Src2 = getNamedOperand(UseMI, AMDGPU::OpName::src2);
2642 const MachineOperand *Dst = getNamedOperand(MI, AMDGPU::OpName::vdst);
2643 const MachineOperand *Src0 = getNamedOperand(MI, AMDGPU::OpName::src0);
2645 getNamedOperand(MI, AMDGPU::OpName::src0_modifiers);
2646 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1);
2648 getNamedOperand(MI, AMDGPU::OpName::src1_modifiers);
2649 const MachineOperand *Src2 = getNamedOperand(MI, AMDGPU::OpName::src2);
2650 const MachineOperand *Clamp = getNamedOperand(MI, AMDGPU::OpName::clamp);
2651 const MachineOperand *Omod = getNamedOperand(MI, AMDGPU::OpName::omod);
3076 Inst32.add(*getNamedOperand(MI, AMDGPU::OpName::src0));
3078 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1);
3082 const MachineOperand *Src2 = getNamedOperand(MI, AMDGPU::OpName::src2);
4260 MachineOperand *SBase = getNamedOperand(MI, AMDGPU::OpName::sbase);
4265 MachineOperand *SOff = getNamedOperand(MI, AMDGPU::OpName::soff);
4651 MachineOperand *SRsrc = getNamedOperand(MI, AMDGPU::OpName::srsrc);
4657 MachineOperand *SSamp = getNamedOperand(MI, AMDGPU::OpName::ssamp);
4694 MachineOperand *VAddr = getNamedOperand(MI, AMDGPU::OpName::vaddr);
4745 MachineOperand *VData = getNamedOperand(MI, AMDGPU::OpName::vdata);
4746 MachineOperand *Offset = getNamedOperand(MI, AMDGPU::OpName::offset);
4747 MachineOperand *SOffset = getNamedOperand(MI, AMDGPU::OpName::soffset);
4752 MachineOperand *VDataIn = getNamedOperand(MI, AMDGPU::OpName::vdata_in);
4767 getNamedOperand(MI, AMDGPU::OpName::glc)) {
4771 getNamedOperand(MI, AMDGPU::OpName::dlc)) {
4778 getNamedOperand(MI, AMDGPU::OpName::tfe)) {
lib/Target/AMDGPU/SIInstrInfo.h 912 return getNamedOperand(const_cast<MachineInstr &>(MI), OpName);
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 453 DMask0 = TII.getNamedOperand(*I, AMDGPU::OpName::dmask)->getImm();
464 GLC0 = TII.getNamedOperand(*I, AMDGPU::OpName::glc)->getImm();
466 SLC0 = TII.getNamedOperand(*I, AMDGPU::OpName::slc)->getImm();
468 DLC0 = TII.getNamedOperand(*I, AMDGPU::OpName::dlc)->getImm();
513 DMask1 = TII.getNamedOperand(*Paired, AMDGPU::OpName::dmask)->getImm();
524 GLC1 = TII.getNamedOperand(*Paired, AMDGPU::OpName::glc)->getImm();
526 SLC1 = TII.getNamedOperand(*Paired, AMDGPU::OpName::slc)->getImm();
528 DLC1 = TII.getNamedOperand(*Paired, AMDGPU::OpName::dlc)->getImm();
642 const auto *TFEOp = TII.getNamedOperand(*CI.I, AMDGPU::OpName::tfe);
643 const auto *LWEOp = TII.getNamedOperand(*CI.I, AMDGPU::OpName::lwe);
877 const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr);
879 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdst);
880 const auto *Dest1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdst);
977 TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr);
979 TII->getNamedOperand(*CI.I, AMDGPU::OpName::data0);
981 TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::data0);
1074 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata);
1075 const auto *Dest1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdata);
1112 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::sbase))
1124 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::sdst);
1125 const auto *Dest1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::sdst);
1159 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr));
1170 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc))
1171 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::soffset))
1186 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata);
1187 const auto *Dest1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdata);
1310 const auto *Src0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata);
1311 const auto *Src1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdata);
1325 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr));
1337 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc))
1338 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::soffset))
1432 TII->getNamedOperand(MI, AMDGPU::OpName::vaddr)->setReg(NewBase);
1433 TII->getNamedOperand(MI, AMDGPU::OpName::offset)->setImm(NewOffset);
1484 const auto *Src0 = TII->getNamedOperand(*BaseLoDef, AMDGPU::OpName::src0);
1485 const auto *Src1 = TII->getNamedOperand(*BaseLoDef, AMDGPU::OpName::src1);
1496 Src0 = TII->getNamedOperand(*BaseHiDef, AMDGPU::OpName::src0);
1497 Src1 = TII->getNamedOperand(*BaseHiDef, AMDGPU::OpName::src1);
1527 if (MI.mayLoad() && TII->getNamedOperand(MI, AMDGPU::OpName::vdata) != NULL)
1535 if (TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm()) {
1541 MachineOperand &Base = *TII->getNamedOperand(MI, AMDGPU::OpName::vaddr);
1600 TII->getNamedOperand(MINext, AMDGPU::OpName::offset)->getImm())
1604 *TII->getNamedOperand(MINext, AMDGPU::OpName::vaddr);
lib/Target/AMDGPU/SILowerSGPRSpills.cpp 282 TII->getNamedOperand(MI, AMDGPU::OpName::vdata)->getReg();
293 int FI = TII->getNamedOperand(MI, AMDGPU::OpName::addr)->getIndex();
lib/Target/AMDGPU/SIModeRegister.cpp 245 unsigned Dst = TII->getNamedOperand(MI, AMDGPU::OpName::simm16)->getImm();
266 unsigned Val = TII->getNamedOperand(MI, AMDGPU::OpName::imm)->getImm();
lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp 230 MachineOperand *Op1 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src0);
231 MachineOperand *Op2 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src1);
246 Op1 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src0);
247 Op2 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src1);
248 MachineOperand *CC = TII->getNamedOperand(*Sel, AMDGPU::OpName::src2);
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 373 MachineOperand *Src = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
374 MachineOperand *SrcSel = TII->getNamedOperand(MI, AMDGPU::OpName::src0_sel);
376 TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers);
380 Src = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
381 SrcSel = TII->getNamedOperand(MI, AMDGPU::OpName::src1_sel);
382 SrcMods = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers);
392 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
394 TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused);
474 MachineOperand *Operand = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
479 MachineOperand *DstSel= TII->getNamedOperand(MI, AMDGPU::OpName::dst_sel);
482 MachineOperand *DstUnused= TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused);
567 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
575 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
576 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
608 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
613 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
614 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
648 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
653 MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2);
677 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
678 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
694 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
695 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
707 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
749 MachineOperand *OrSDWA = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
750 MachineOperand *OrOther = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
754 OrSDWA = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
755 OrOther = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
840 MachineOperand *OrDst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
891 const MachineOperand *Sdst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst);
903 MachineOperand *CarryIn = TII->getNamedOperand(MISucc, AMDGPU::OpName::src2);
906 MachineOperand *CarryOut = TII->getNamedOperand(MISucc, AMDGPU::OpName::sdst);
925 NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::vdst));
926 NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src0));
927 NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src1));
931 NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::vdst));
932 NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src0));
933 NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src1));
956 const MachineOperand *SDst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst);
967 } else if (TII->getNamedOperand(MI, AMDGPU::OpName::sdst) ||
968 !TII->getNamedOperand(MI, AMDGPU::OpName::vdst)) {
1013 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
1017 } else if ((Dst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst))) {
1028 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
1033 if (auto *Mod = TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers))
1040 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1045 if (auto *Mod = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers))
1057 MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2);
1064 MachineOperand *Clamp = TII->getNamedOperand(MI, AMDGPU::OpName::clamp);
1073 MachineOperand *OMod = TII->getNamedOperand(MI, AMDGPU::OpName::omod);
1083 MachineOperand *DstSel = TII->getNamedOperand(MI, AMDGPU::OpName::dst_sel);
1093 MachineOperand *DstUnused = TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused);
1103 MachineOperand *Src0Sel = TII->getNamedOperand(MI, AMDGPU::OpName::src0_sel);
1113 MachineOperand *Src1Sel = TII->getNamedOperand(MI, AMDGPU::OpName::src1_sel);
1122 auto DstUnused = TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused);
lib/Target/AMDGPU/SIRegisterInfo.cpp 394 MachineOperand *FIOp = TII->getNamedOperand(MI, AMDGPU::OpName::vaddr);
401 assert(TII->getNamedOperand(MI, AMDGPU::OpName::soffset)->getReg() ==
405 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset);
590 const MachineOperand *Reg = TII->getNamedOperand(*MI, AMDGPU::OpName::vdata);
597 .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc))
598 .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::soffset))
607 const MachineOperand *VDataIn = TII->getNamedOperand(*MI,
647 hasAGPRs(RC) ? TII->getNamedOperand(*MI, AMDGPU::OpName::tmp)->getReg()
1041 const MachineOperand *VData = TII->getNamedOperand(*MI,
1043 assert(TII->getNamedOperand(*MI, AMDGPU::OpName::soffset)->getReg() ==
1049 TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc)->getReg(),
1051 TII->getNamedOperand(*MI, AMDGPU::OpName::offset)->getImm(),
1071 const MachineOperand *VData = TII->getNamedOperand(*MI,
1073 assert(TII->getNamedOperand(*MI, AMDGPU::OpName::soffset)->getReg() ==
1079 TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc)->getReg(),
1081 TII->getNamedOperand(*MI, AMDGPU::OpName::offset)->getImm(),
1206 assert(TII->getNamedOperand(*MI, AMDGPU::OpName::soffset)->getReg() ==
1209 TII->getNamedOperand(*MI, AMDGPU::OpName::soffset)->setReg(FrameReg);
1213 = TII->getNamedOperand(*MI, AMDGPU::OpName::offset)->getImm();
lib/Target/AMDGPU/SIShrinkInstructions.cpp 741 TII->getNamedOperand(MI, AMDGPU::OpName::src2);
754 const MachineOperand *SDst = TII->getNamedOperand(MI,
758 const MachineOperand *Src2 = TII->getNamedOperand(MI,