reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/SIPeepholeSDWA.cpp
  535       if (!TII->isFoldableCopy(*DefInst))
  567     MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
  575     MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
  576     MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
  608     MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
  613     MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
  614     MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
  648     MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
  653     MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2);
  677     MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
  678     MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
  694     MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
  695     MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
  707     MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
  739         if (!TII->isSDWA(*Op1Inst))
  749     MachineOperand *OrSDWA = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
  750     MachineOperand *OrOther = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
  754       OrSDWA = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
  755       OrOther = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
  789     if (!TII->isSDWA(*OtherInst))
  793       TII->getNamedImmOperand(*SDWAInst, AMDGPU::OpName::dst_sel));;
  795       TII->getNamedImmOperand(*OtherInst, AMDGPU::OpName::dst_sel));
  835       TII->getNamedImmOperand(*OtherInst, AMDGPU::OpName::dst_unused));
  840     MachineOperand *OrDst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
  887   if (!TII->canShrink(MI, *MRI))
  891   const MachineOperand *Sdst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst);
  899   if (!TII->canShrink(MISucc, *MRI))
  903   MachineOperand *CarryIn = TII->getNamedOperand(MISucc, AMDGPU::OpName::src2);
  906   MachineOperand *CarryOut = TII->getNamedOperand(MISucc, AMDGPU::OpName::sdst);
  924   auto NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(Opc));
  925   NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::vdst));
  926   NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src0));
  927   NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src1));
  930   auto NewInst = BuildMI(MBB, MISucc, MISucc.getDebugLoc(), TII->get(SuccOpc));
  931   NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::vdst));
  932   NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src0));
  933   NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src1));
  941   if (TII->isSDWA(Opc))
  951   if (!ST.hasSDWAOmod() && TII->hasModifiersSet(MI, AMDGPU::OpName::omod))
  954   if (TII->isVOPC(Opc)) {
  956       const MachineOperand *SDst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst);
  963         (TII->hasModifiersSet(MI, AMDGPU::OpName::clamp) ||
  964          TII->hasModifiersSet(MI, AMDGPU::OpName::omod)))
  967   } else if (TII->getNamedOperand(MI, AMDGPU::OpName::sdst) ||
  968              !TII->getNamedOperand(MI, AMDGPU::OpName::vdst)) {
  979   if (TII->pseudoToMCOpcode(Opc) == -1)
  997   if (TII->isSDWA(Opcode)) {
 1006   const MCInstrDesc &SDWADesc = TII->get(SDWAOpcode);
 1013   MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
 1017   } else if ((Dst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst))) {
 1028   MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
 1033   if (auto *Mod = TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers))
 1040   MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
 1045     if (auto *Mod = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers))
 1057     MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2);
 1064   MachineOperand *Clamp = TII->getNamedOperand(MI, AMDGPU::OpName::clamp);
 1073     MachineOperand *OMod = TII->getNamedOperand(MI, AMDGPU::OpName::omod);
 1083     MachineOperand *DstSel = TII->getNamedOperand(MI, AMDGPU::OpName::dst_sel);
 1093     MachineOperand *DstUnused = TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused);
 1103   MachineOperand *Src0Sel = TII->getNamedOperand(MI, AMDGPU::OpName::src0_sel);
 1113     MachineOperand *Src1Sel = TII->getNamedOperand(MI, AMDGPU::OpName::src1_sel);
 1122   auto DstUnused = TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused);
 1155       Converted |= Operand->convertToSDWA(*SDWAInst, TII);
 1175   const MCInstrDesc &Desc = TII->get(MI.getOpcode());
 1194                         TII->get(AMDGPU::V_MOV_B32_e32), VGPR);
 1212   TII = ST.getInstrInfo();
 1226         MachineInstr *PotentialMI = Operand->potentialToConvert(TII);
 1239         MachineInstr *PotentialMI = Operand->potentialToConvert(TII);