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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenDAGISel.inc43861 /* 96805*/ /*SwitchOpcode*/ 97, TARGET_VAL(ARMISD::VMOVDRR),// ->96905
44529 /* 98447*/ OPC_CheckOpcode, TARGET_VAL(ARMISD::VMOVDRR),
45239 /*100122*/ /*SwitchOpcode*/ 20, TARGET_VAL(ARMISD::VMOVDRR),// ->100145
gen/lib/Target/ARM/ARMGenFastISel.inc 5154 case ARMISD::VMOVDRR: return fastEmit_ARMISD_VMOVDRR_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
lib/Target/ARM/ARMISelLowering.cpp 1555 case ARMISD::VMOVDRR: return "ARMISD::VMOVDRR";
1963 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
1980 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
3866 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2);
4679 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Low, High);
5452 Tmp0.getOpcode() == ARMISD::VMOVDRR;
5523 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
5751 DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi));
6534 return DAG.getNode(ARMISD::VMOVDRR, DL, MVT::f64, Lo, Hi);
12577 if (InDouble.getOpcode() == ARMISD::VMOVDRR && Subtarget->hasFP64())
13413 if (StVal.getNode()->getOpcode() == ARMISD::VMOVDRR &&
14436 case ARMISD::VMOVDRR: return PerformVMOVDRRCombine(N, DCI.DAG);