reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1784 const MCInstrDesc &MCID = getInstDesc(Inst.getOpcode()); 1787 Inst.setLoc(IDLoc); 1790 const unsigned Opcode = Inst.getOpcode(); 1808 Offset = Inst.getOperand(2); 1838 Offset = Inst.getOperand(1); 1854 Offset = Inst.getOperand(2); 1867 Offset = Inst.getOperand(1); 1878 Offset = Inst.getOperand(1); 1891 Offset = Inst.getOperand(1); 1904 if (hasMips32r6() && Inst.getOpcode() == Mips::SSNOP) { 1911 const unsigned Opcode = Inst.getOpcode(); 1925 Opnd = Inst.getOperand(1); 1933 Inst.setOpcode(Opcode == Mips::BBIT0 ? Mips::BBIT032 1935 Inst.getOperand(1).setImm(Imm - 32); 1942 Opnd = Inst.getOperand(2); 1961 switch (Inst.getOpcode()) { 1968 if (Inst.getOperand(2).getImm() == 0) { 1969 if (Inst.getOperand(1).getReg() == Mips::ZERO || 1970 Inst.getOperand(1).getReg() == Mips::ZERO_64) 1995 if (Inst.getOperand(SecondOp).getReg() == Mips::ZERO || 1996 Inst.getOperand(SecondOp).getReg() == Mips::ZERO_64) { 1997 if (Inst.getOperand(FirstOp).getReg() == Mips::ZERO || 1998 Inst.getOperand(FirstOp).getReg() == Mips::ZERO_64) 2007 if ((Inst.getOpcode() == Mips::J || Inst.getOpcode() == Mips::J_MM) && 2007 if ((Inst.getOpcode() == Mips::J || Inst.getOpcode() == Mips::J_MM) && 2013 BInst.addOperand(Inst.getOperand(0)); 2014 Inst = BInst; 2019 if ((Inst.getOpcode() == Mips::JAL || Inst.getOpcode() == Mips::JAL_MM) && 2019 if ((Inst.getOpcode() == Mips::JAL || Inst.getOpcode() == Mips::JAL_MM) && 2023 const MCExpr *JalExpr = Inst.getOperand(0).getExpr(); 2036 if (expandLoadAddress(Mips::T9, Mips::NoRegister, Inst.getOperand(0), 2064 Inst = JalrInst; 2076 MCOperand &Op = Inst.getOperand(i); 2081 expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad()); 2091 expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad()); 2095 expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad()); 2104 if (MCID.mayLoad() && Inst.getOpcode() != Mips::LWP_MM) { 2110 MCOperand &Op = Inst.getOperand(i); 2113 MCOperand &DstReg = Inst.getOperand(0); 2114 MCOperand &BaseReg = Inst.getOperand(1); 2135 switch (Inst.getOpcode()) { 2139 Opnd = Inst.getOperand(0); 2149 Opnd = Inst.getOperand(2); 2157 Opnd = Inst.getOperand(1); 2165 Opnd = Inst.getOperand(2); 2174 Opnd = Inst.getOperand(2); 2184 Opnd = Inst.getOperand(2); 2193 Opnd = Inst.getOperand(2); 2203 Opnd = Inst.getOperand(2); 2213 Opnd = Inst.getOperand(2); 2221 Opnd = Inst.getOperand(1); 2230 if (Inst.getOperand(0).getReg() == Mips::RA) 2235 unsigned R0 = Inst.getOperand(0).getReg(); 2236 unsigned R1 = Inst.getOperand(1).getReg(); 2258 tryExpandInstruction(Inst, IDLoc, Out, STI); 2261 Out.EmitInstruction(Inst, *STI); 2279 TOut.emitEmptyDelaySlot(hasShortDelaySlot(Inst), IDLoc, STI); 2283 if ((Inst.getOpcode() == Mips::JalOneReg || 2284 Inst.getOpcode() == Mips::JalTwoReg || ExpandedJalSym) && 2291 TOut.emitEmptyDelaySlot(hasShortDelaySlot(Inst), IDLoc,