1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
define void @load1_s8_to_load1_s32(i8* %px) {entry: ret void}
define void @load2_s16_to_load2_s32(i16* %px) {entry: ret void}
define void @load_store_i1(i1* %px, i1* %py) {entry: ret void}
define void @load_store_i8(i8* %px, i8* %py) {entry: ret void}
define void @load_store_i16(i16* %px, i16* %py) {entry: ret void}
define void @load_store_i32(i32* %px, i32* %py) {entry: ret void}
...
---
name: load1_s8_to_load1_s32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; MIPS32-LABEL: name: load1_s8_to_load1_s32
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 1 from %ir.px)
; MIPS32: $v0 = COPY [[LOAD]](s32)
; MIPS32: RetRA implicit $v0
%0:_(p0) = COPY $a0
%2:_(s32) = G_LOAD %0(p0) :: (load 1 from %ir.px)
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: load2_s16_to_load2_s32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; MIPS32-LABEL: name: load2_s16_to_load2_s32
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 2 from %ir.px)
; MIPS32: $v0 = COPY [[LOAD]](s32)
; MIPS32: RetRA implicit $v0
%0:_(p0) = COPY $a0
%2:_(s32) = G_LOAD %0(p0) :: (load 2 from %ir.px)
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: load_store_i1
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: load_store_i1
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load 1 from %ir.py)
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
; MIPS32: G_STORE [[AND]](s32), [[COPY]](p0) :: (store 1 into %ir.px)
; MIPS32: RetRA
%0:_(p0) = COPY $a0
%1:_(p0) = COPY $a1
%2:_(s1) = G_LOAD %1(p0) :: (load 1 from %ir.py)
G_STORE %2(s1), %0(p0) :: (store 1 into %ir.px)
RetRA
...
---
name: load_store_i8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: load_store_i8
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load 1 from %ir.py)
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
; MIPS32: G_STORE [[COPY2]](s32), [[COPY]](p0) :: (store 1 into %ir.px)
; MIPS32: RetRA
%0:_(p0) = COPY $a0
%1:_(p0) = COPY $a1
%2:_(s8) = G_LOAD %1(p0) :: (load 1 from %ir.py)
G_STORE %2(s8), %0(p0) :: (store 1 into %ir.px)
RetRA
...
---
name: load_store_i16
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: load_store_i16
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load 2 from %ir.py)
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
; MIPS32: G_STORE [[COPY2]](s32), [[COPY]](p0) :: (store 2 into %ir.px)
; MIPS32: RetRA
%0:_(p0) = COPY $a0
%1:_(p0) = COPY $a1
%2:_(s16) = G_LOAD %1(p0) :: (load 2 from %ir.py)
G_STORE %2(s16), %0(p0) :: (store 2 into %ir.px)
RetRA
...
---
name: load_store_i32
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: load_store_i32
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load 4 from %ir.py)
; MIPS32: G_STORE [[LOAD]](s32), [[COPY]](p0) :: (store 4 into %ir.px)
; MIPS32: RetRA
%0:_(p0) = COPY $a0
%1:_(p0) = COPY $a1
%2:_(s32) = G_LOAD %1(p0) :: (load 4 from %ir.py)
G_STORE %2(s32), %0(p0) :: (store 4 into %ir.px)
RetRA
...
|