1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
define i32 @sadd_sat32(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[B:%.*]], i32 [[A:%.*]])
; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
%conv = sext i32 %a to i64
%conv1 = sext i32 %b to i64
%add = add i64 %conv1, %conv
%0 = icmp slt i64 %add, 2147483647
%spec.store.select = select i1 %0, i64 %add, i64 2147483647
%1 = icmp sgt i64 %spec.store.select, -2147483648
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 -2147483648
%conv7 = trunc i64 %spec.store.select8 to i32
ret i32 %conv7
}
define i32 @ssub_sat32(i32 %a, i32 %b) {
; CHECK-LABEL: @ssub_sat32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[A:%.*]], i32 [[B:%.*]])
; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
%conv = sext i32 %a to i64
%conv1 = sext i32 %b to i64
%sub = sub i64 %conv, %conv1
%0 = icmp slt i64 %sub, 2147483647
%spec.store.select = select i1 %0, i64 %sub, i64 2147483647
%1 = icmp sgt i64 %spec.store.select, -2147483648
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 -2147483648
%conv7 = trunc i64 %spec.store.select8 to i32
ret i32 %conv7
}
define i32 @smul_sat32(i32 %a, i32 %b) {
; CHECK-LABEL: @smul_sat32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
; CHECK-NEXT: [[ADD:%.*]] = mul nsw i64 [[CONV1]], [[CONV]]
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[ADD]], 2147483647
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 2147483647
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[SPEC_STORE_SELECT]], -2147483648
; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select i1 [[TMP1]], i64 [[SPEC_STORE_SELECT]], i64 -2147483648
; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[SPEC_STORE_SELECT8]] to i32
; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
%conv = sext i32 %a to i64
%conv1 = sext i32 %b to i64
%add = mul i64 %conv1, %conv
%0 = icmp slt i64 %add, 2147483647
%spec.store.select = select i1 %0, i64 %add, i64 2147483647
%1 = icmp sgt i64 %spec.store.select, -2147483648
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 -2147483648
%conv7 = trunc i64 %spec.store.select8 to i32
ret i32 %conv7
}
define signext i16 @sadd_sat16(i16 signext %a, i16 signext %b) {
; CHECK-LABEL: @sadd_sat16(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[B:%.*]], i16 [[A:%.*]])
; CHECK-NEXT: ret i16 [[TMP0]]
;
entry:
%conv = sext i16 %a to i32
%conv1 = sext i16 %b to i32
%add = add i32 %conv1, %conv
%0 = icmp slt i32 %add, 32767
%spec.store.select = select i1 %0, i32 %add, i32 32767
%1 = icmp sgt i32 %spec.store.select, -32768
%spec.store.select10 = select i1 %1, i32 %spec.store.select, i32 -32768
%conv9 = trunc i32 %spec.store.select10 to i16
ret i16 %conv9
}
define signext i16 @ssub_sat16(i16 signext %a, i16 signext %b) {
; CHECK-LABEL: @ssub_sat16(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[A:%.*]], i16 [[B:%.*]])
; CHECK-NEXT: ret i16 [[TMP0]]
;
entry:
%conv = sext i16 %a to i32
%conv1 = sext i16 %b to i32
%sub = sub i32 %conv, %conv1
%0 = icmp slt i32 %sub, 32767
%spec.store.select = select i1 %0, i32 %sub, i32 32767
%1 = icmp sgt i32 %spec.store.select, -32768
%spec.store.select10 = select i1 %1, i32 %spec.store.select, i32 -32768
%conv9 = trunc i32 %spec.store.select10 to i16
ret i16 %conv9
}
define signext i8 @sadd_sat8(i8 signext %a, i8 signext %b) {
; CHECK-LABEL: @sadd_sat8(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.sadd.sat.i8(i8 [[B:%.*]], i8 [[A:%.*]])
; CHECK-NEXT: ret i8 [[TMP0]]
;
entry:
%conv = sext i8 %a to i32
%conv1 = sext i8 %b to i32
%add = add i32 %conv1, %conv
%0 = icmp slt i32 %add, 127
%spec.store.select = select i1 %0, i32 %add, i32 127
%1 = icmp sgt i32 %spec.store.select, -128
%spec.store.select10 = select i1 %1, i32 %spec.store.select, i32 -128
%conv9 = trunc i32 %spec.store.select10 to i8
ret i8 %conv9
}
define signext i8 @ssub_sat8(i8 signext %a, i8 signext %b) {
; CHECK-LABEL: @ssub_sat8(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.ssub.sat.i8(i8 [[A:%.*]], i8 [[B:%.*]])
; CHECK-NEXT: ret i8 [[TMP0]]
;
entry:
%conv = sext i8 %a to i32
%conv1 = sext i8 %b to i32
%sub = sub i32 %conv, %conv1
%0 = icmp slt i32 %sub, 127
%spec.store.select = select i1 %0, i32 %sub, i32 127
%1 = icmp sgt i32 %spec.store.select, -128
%spec.store.select10 = select i1 %1, i32 %spec.store.select, i32 -128
%conv9 = trunc i32 %spec.store.select10 to i8
ret i8 %conv9
}
define signext i64 @sadd_sat64(i64 signext %a, i64 signext %b) {
; CHECK-LABEL: @sadd_sat64(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.sadd.sat.i64(i64 [[B:%.*]], i64 [[A:%.*]])
; CHECK-NEXT: ret i64 [[TMP0]]
;
entry:
%conv = sext i64 %a to i65
%conv1 = sext i64 %b to i65
%add = add i65 %conv1, %conv
%0 = icmp slt i65 %add, 9223372036854775807
%spec.store.select = select i1 %0, i65 %add, i65 9223372036854775807
%1 = icmp sgt i65 %spec.store.select, -9223372036854775808
%spec.store.select10 = select i1 %1, i65 %spec.store.select, i65 -9223372036854775808
%conv9 = trunc i65 %spec.store.select10 to i64
ret i64 %conv9
}
define signext i64 @ssub_sat64(i64 signext %a, i64 signext %b) {
; CHECK-LABEL: @ssub_sat64(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.ssub.sat.i64(i64 [[A:%.*]], i64 [[B:%.*]])
; CHECK-NEXT: ret i64 [[TMP0]]
;
entry:
%conv = sext i64 %a to i65
%conv1 = sext i64 %b to i65
%sub = sub i65 %conv, %conv1
%0 = icmp slt i65 %sub, 9223372036854775807
%spec.store.select = select i1 %0, i65 %sub, i65 9223372036854775807
%1 = icmp sgt i65 %spec.store.select, -9223372036854775808
%spec.store.select10 = select i1 %1, i65 %spec.store.select, i65 -9223372036854775808
%conv9 = trunc i65 %spec.store.select10 to i64
ret i64 %conv9
}
define signext i4 @sadd_sat4(i4 signext %a, i4 signext %b) {
; CHECK-LABEL: @sadd_sat4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sext i4 [[A:%.*]] to i32
; CHECK-NEXT: [[CONV1:%.*]] = sext i4 [[B:%.*]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV1]], [[CONV]]
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[ADD]], 7
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i32 [[ADD]], i32 7
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[SPEC_STORE_SELECT]], -8
; CHECK-NEXT: [[SPEC_STORE_SELECT10:%.*]] = select i1 [[TMP1]], i32 [[SPEC_STORE_SELECT]], i32 -8
; CHECK-NEXT: [[CONV9:%.*]] = trunc i32 [[SPEC_STORE_SELECT10]] to i4
; CHECK-NEXT: ret i4 [[CONV9]]
;
entry:
%conv = sext i4 %a to i32
%conv1 = sext i4 %b to i32
%add = add i32 %conv1, %conv
%0 = icmp slt i32 %add, 7
%spec.store.select = select i1 %0, i32 %add, i32 7
%1 = icmp sgt i32 %spec.store.select, -8
%spec.store.select10 = select i1 %1, i32 %spec.store.select, i32 -8
%conv9 = trunc i32 %spec.store.select10 to i4
ret i4 %conv9
}
define signext i4 @ssub_sat4(i4 signext %a, i4 signext %b) {
; CHECK-LABEL: @ssub_sat4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sext i4 [[A:%.*]] to i32
; CHECK-NEXT: [[CONV1:%.*]] = sext i4 [[B:%.*]] to i32
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV1]]
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[SUB]], 7
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i32 [[SUB]], i32 7
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[SPEC_STORE_SELECT]], -8
; CHECK-NEXT: [[SPEC_STORE_SELECT10:%.*]] = select i1 [[TMP1]], i32 [[SPEC_STORE_SELECT]], i32 -8
; CHECK-NEXT: [[CONV9:%.*]] = trunc i32 [[SPEC_STORE_SELECT10]] to i4
; CHECK-NEXT: ret i4 [[CONV9]]
;
entry:
%conv = sext i4 %a to i32
%conv1 = sext i4 %b to i32
%sub = sub i32 %conv, %conv1
%0 = icmp slt i32 %sub, 7
%spec.store.select = select i1 %0, i32 %sub, i32 7
%1 = icmp sgt i32 %spec.store.select, -8
%spec.store.select10 = select i1 %1, i32 %spec.store.select, i32 -8
%conv9 = trunc i32 %spec.store.select10 to i4
ret i4 %conv9
}
define <4 x i32> @sadd_satv4i32(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @sadd_satv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> [[B:%.*]], <4 x i32> [[A:%.*]])
; CHECK-NEXT: ret <4 x i32> [[TMP0]]
;
entry:
%conv = sext <4 x i32> %a to <4 x i64>
%conv1 = sext <4 x i32> %b to <4 x i64>
%add = add <4 x i64> %conv1, %conv
%0 = icmp slt <4 x i64> %add, <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>
%spec.store.select = select <4 x i1> %0, <4 x i64> %add, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>
%1 = icmp sgt <4 x i64> %spec.store.select, <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>
%spec.store.select8 = select <4 x i1> %1, <4 x i64> %spec.store.select, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>
%conv7 = trunc <4 x i64> %spec.store.select8 to <4 x i32>
ret <4 x i32> %conv7
}
define <4 x i32> @ssub_satv4i32(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @ssub_satv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> [[B:%.*]], <4 x i32> [[A:%.*]])
; CHECK-NEXT: ret <4 x i32> [[TMP0]]
;
entry:
%conv = sext <4 x i32> %a to <4 x i64>
%conv1 = sext <4 x i32> %b to <4 x i64>
%add = sub <4 x i64> %conv1, %conv
%0 = icmp slt <4 x i64> %add, <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>
%spec.store.select = select <4 x i1> %0, <4 x i64> %add, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>
%1 = icmp sgt <4 x i64> %spec.store.select, <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>
%spec.store.select8 = select <4 x i1> %1, <4 x i64> %spec.store.select, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>
%conv7 = trunc <4 x i64> %spec.store.select8 to <4 x i32>
ret <4 x i32> %conv7
}
define <4 x i32> @sadd_satv4i4(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @sadd_satv4i4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add <4 x i32> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt <4 x i32> [[ADD]], <i32 15, i32 15, i32 15, i32 15>
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[ADD]], <4 x i32> <i32 15, i32 15, i32 15, i32 15>
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[SPEC_STORE_SELECT]], <i32 -16, i32 -16, i32 -16, i32 -16>
; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[SPEC_STORE_SELECT]], <4 x i32> <i32 -16, i32 -16, i32 -16, i32 -16>
; CHECK-NEXT: ret <4 x i32> [[SPEC_STORE_SELECT8]]
;
entry:
%add = add <4 x i32> %a, %b
%0 = icmp slt <4 x i32> %add, <i32 15, i32 15, i32 15, i32 15>
%spec.store.select = select <4 x i1> %0, <4 x i32> %add, <4 x i32> <i32 15, i32 15, i32 15, i32 15>
%1 = icmp sgt <4 x i32> %spec.store.select, <i32 -16, i32 -16, i32 -16, i32 -16>
%spec.store.select8 = select <4 x i1> %1, <4 x i32> %spec.store.select, <4 x i32> <i32 -16, i32 -16, i32 -16, i32 -16>
ret <4 x i32> %spec.store.select8
}
define <4 x i32> @ssub_satv4i4(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @ssub_satv4i4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = sub <4 x i32> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt <4 x i32> [[ADD]], <i32 15, i32 15, i32 15, i32 15>
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[ADD]], <4 x i32> <i32 15, i32 15, i32 15, i32 15>
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[SPEC_STORE_SELECT]], <i32 -16, i32 -16, i32 -16, i32 -16>
; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[SPEC_STORE_SELECT]], <4 x i32> <i32 -16, i32 -16, i32 -16, i32 -16>
; CHECK-NEXT: ret <4 x i32> [[SPEC_STORE_SELECT8]]
;
entry:
%add = sub <4 x i32> %a, %b
%0 = icmp slt <4 x i32> %add, <i32 15, i32 15, i32 15, i32 15>
%spec.store.select = select <4 x i1> %0, <4 x i32> %add, <4 x i32> <i32 15, i32 15, i32 15, i32 15>
%1 = icmp sgt <4 x i32> %spec.store.select, <i32 -16, i32 -16, i32 -16, i32 -16>
%spec.store.select8 = select <4 x i1> %1, <4 x i32> %spec.store.select, <4 x i32> <i32 -16, i32 -16, i32 -16, i32 -16>
ret <4 x i32> %spec.store.select8
}
define i32 @sadd_sat32_extrause_1(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32_extrause_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[B:%.*]], i32 [[A:%.*]])
; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = sext i32 [[TMP0]] to i64
; CHECK-NEXT: call void @use64(i64 [[SPEC_STORE_SELECT8]])
; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
%conv = sext i32 %a to i64
%conv1 = sext i32 %b to i64
%add = add i64 %conv1, %conv
%0 = icmp slt i64 %add, 2147483647
%spec.store.select = select i1 %0, i64 %add, i64 2147483647
%1 = icmp sgt i64 %spec.store.select, -2147483648
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 -2147483648
%conv7 = trunc i64 %spec.store.select8 to i32
call void @use64(i64 %spec.store.select8)
ret i32 %conv7
}
define i32 @sadd_sat32_extrause_2(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32_extrause_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[ADD]], 2147483647
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 2147483647
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[SPEC_STORE_SELECT]], -2147483648
; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select i1 [[TMP1]], i64 [[SPEC_STORE_SELECT]], i64 -2147483648
; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[SPEC_STORE_SELECT8]] to i32
; CHECK-NEXT: call void @use64(i64 [[SPEC_STORE_SELECT]])
; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
%conv = sext i32 %a to i64
%conv1 = sext i32 %b to i64
%add = add i64 %conv1, %conv
%0 = icmp slt i64 %add, 2147483647
%spec.store.select = select i1 %0, i64 %add, i64 2147483647
%1 = icmp sgt i64 %spec.store.select, -2147483648
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 -2147483648
%conv7 = trunc i64 %spec.store.select8 to i32
call void @use64(i64 %spec.store.select)
ret i32 %conv7
}
define i32 @sadd_sat32_extrause_3(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32_extrause_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[ADD]], 2147483647
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 2147483647
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[SPEC_STORE_SELECT]], -2147483648
; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select i1 [[TMP1]], i64 [[SPEC_STORE_SELECT]], i64 -2147483648
; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[SPEC_STORE_SELECT8]] to i32
; CHECK-NEXT: call void @use64(i64 [[ADD]])
; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
%conv = sext i32 %a to i64
%conv1 = sext i32 %b to i64
%add = add i64 %conv1, %conv
%0 = icmp slt i64 %add, 2147483647
%spec.store.select = select i1 %0, i64 %add, i64 2147483647
%1 = icmp sgt i64 %spec.store.select, -2147483648
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 -2147483648
%conv7 = trunc i64 %spec.store.select8 to i32
call void @use64(i64 %add)
ret i32 %conv7
}
define i32 @sadd_sat32_trunc(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32_trunc(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[ADD]], 32767
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 32767
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[SPEC_STORE_SELECT]], -32768
; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select i1 [[TMP1]], i64 [[SPEC_STORE_SELECT]], i64 -32768
; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[SPEC_STORE_SELECT8]] to i32
; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
%conv = sext i32 %a to i64
%conv1 = sext i32 %b to i64
%add = add i64 %conv1, %conv
%0 = icmp slt i64 %add, 32767
%spec.store.select = select i1 %0, i64 %add, i64 32767
%1 = icmp sgt i64 %spec.store.select, -32768
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 -32768
%conv7 = trunc i64 %spec.store.select8 to i32
ret i32 %conv7
}
define i32 @sadd_sat32_ext16(i32 %a, i16 %b) {
; CHECK-LABEL: @sadd_sat32_ext16(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = sext i16 [[B:%.*]] to i32
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 [[A:%.*]])
; CHECK-NEXT: ret i32 [[TMP1]]
;
entry:
%conv = sext i32 %a to i64
%conv1 = sext i16 %b to i64
%add = add i64 %conv1, %conv
%0 = icmp slt i64 %add, 2147483647
%spec.store.select = select i1 %0, i64 %add, i64 2147483647
%1 = icmp sgt i64 %spec.store.select, -2147483648
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 -2147483648
%conv7 = trunc i64 %spec.store.select8 to i32
ret i32 %conv7
}
define i8 @sadd_sat8_ext8(i8 %a, i16 %b) {
; CHECK-LABEL: @sadd_sat8_ext8(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
; CHECK-NEXT: [[CONV1:%.*]] = sext i16 [[B:%.*]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV1]], [[CONV]]
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[ADD]], 127
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i32 [[ADD]], i32 127
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[SPEC_STORE_SELECT]], -128
; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select i1 [[TMP1]], i32 [[SPEC_STORE_SELECT]], i32 -128
; CHECK-NEXT: [[CONV7:%.*]] = trunc i32 [[SPEC_STORE_SELECT8]] to i8
; CHECK-NEXT: ret i8 [[CONV7]]
;
entry:
%conv = sext i8 %a to i32
%conv1 = sext i16 %b to i32
%add = add i32 %conv1, %conv
%0 = icmp slt i32 %add, 127
%spec.store.select = select i1 %0, i32 %add, i32 127
%1 = icmp sgt i32 %spec.store.select, -128
%spec.store.select8 = select i1 %1, i32 %spec.store.select, i32 -128
%conv7 = trunc i32 %spec.store.select8 to i8
ret i8 %conv7
}
define i32 @sadd_sat32_zext(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32_zext(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[B:%.*]] to i64
; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i64 [[CONV1]], [[CONV]]
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i64 [[ADD]], 2147483647
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 2147483647
; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[SPEC_STORE_SELECT]] to i32
; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
%conv = zext i32 %a to i64
%conv1 = zext i32 %b to i64
%add = add i64 %conv1, %conv
%0 = icmp slt i64 %add, 2147483647
%spec.store.select = select i1 %0, i64 %add, i64 2147483647
%1 = icmp sgt i64 %spec.store.select, -2147483648
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 -2147483648
%conv7 = trunc i64 %spec.store.select8 to i32
ret i32 %conv7
}
define i32 @sadd_sat32_maxmin(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32_maxmin(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[B:%.*]], i32 [[A:%.*]])
; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
%conv = sext i32 %a to i64
%conv1 = sext i32 %b to i64
%add = add i64 %conv1, %conv
%0 = icmp sgt i64 %add, -2147483648
%spec.store.select = select i1 %0, i64 %add, i64 -2147483648
%1 = icmp slt i64 %spec.store.select, 2147483647
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 2147483647
%conv7 = trunc i64 %spec.store.select8 to i32
ret i32 %conv7
}
define i64 @sadd_sat32_notrunc(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32_notrunc(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[B:%.*]], i32 [[A:%.*]])
; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = sext i32 [[TMP0]] to i64
; CHECK-NEXT: ret i64 [[SPEC_STORE_SELECT8]]
;
entry:
%conv = sext i32 %a to i64
%conv1 = sext i32 %b to i64
%add = add i64 %conv1, %conv
%0 = icmp sgt i64 %add, -2147483648
%spec.store.select = select i1 %0, i64 %add, i64 -2147483648
%1 = icmp slt i64 %spec.store.select, 2147483647
%spec.store.select8 = select i1 %1, i64 %spec.store.select, i64 2147483647
ret i64 %spec.store.select8
}
declare void @use64(i64)
|