|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
tools/lldb/source/API/SystemInitializerFull.cpp 238 EmulateInstructionARM::Initialize();
335 EmulateInstructionARM::Terminate();
tools/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp 735 if (EmulateInstructionARM::SupportsEmulatingInstructionsOfTypeStatic(
738 std::unique_ptr<EmulateInstructionARM> emulate_insn_up(
739 new EmulateInstructionARM(arch));
744 std::unique_ptr<EmulateInstructionARM> emulate_insn_up(
745 new EmulateInstructionARM(arch));
12847 EmulateInstructionARM::ARMOpcode *
12855 &EmulateInstructionARM::EmulatePUSH, "push <registers>"},
12857 &EmulateInstructionARM::EmulatePUSH, "push <register>"},
12861 &EmulateInstructionARM::EmulateADDRdSPImm, "add r7, sp, #<const>"},
12863 &EmulateInstructionARM::EmulateSUBR7IPImm, "sub r7, ip, #<const>"},
12866 &EmulateInstructionARM::EmulateMOVRdSP, "mov ip, sp"},
12868 &EmulateInstructionARM::EmulateADDRdSPImm, "add ip, sp, #<const>"},
12870 &EmulateInstructionARM::EmulateSUBIPSPImm, "sub ip, sp, #<const>"},
12874 &EmulateInstructionARM::EmulateSUBSPImm, "sub sp, sp, #<const>"},
12876 &EmulateInstructionARM::EmulateSUBSPReg,
12882 &EmulateInstructionARM::EmulateSTRRtSP, "str Rt, [sp, #-imm12]!"},
12886 &EmulateInstructionARM::EmulateVPUSH, "vpush.64 <list>"},
12888 &EmulateInstructionARM::EmulateVPUSH, "vpush.32 <list>"},
12893 &EmulateInstructionARM::EmulatePOP, "pop <registers>"},
12895 &EmulateInstructionARM::EmulatePOP, "pop <register>"},
12897 &EmulateInstructionARM::EmulateVPOP, "vpop.64 <list>"},
12899 &EmulateInstructionARM::EmulateVPOP, "vpop.32 <list>"},
12903 &EmulateInstructionARM::EmulateSVC, "svc #imm24"},
12909 &EmulateInstructionARM::EmulateBLXImmediate, "blx <label>"},
12911 &EmulateInstructionARM::EmulateB, "b #imm24"},
12913 &EmulateInstructionARM::EmulateBLXImmediate, "bl <label>"},
12915 &EmulateInstructionARM::EmulateBLXRm, "blx <Rm>"},
12918 &EmulateInstructionARM::EmulateBXRm, "bx <Rm>"},
12921 &EmulateInstructionARM::EmulateBXJRm, "bxj <Rm>"},
12926 &EmulateInstructionARM::EmulateADCImm, "adc{s}<c> <Rd>, <Rn>, #const"},
12929 &EmulateInstructionARM::EmulateADCReg,
12933 &EmulateInstructionARM::EmulateADDImmARM,
12937 &EmulateInstructionARM::EmulateADDReg,
12941 &EmulateInstructionARM::EmulateADDRegShift,
12945 &EmulateInstructionARM::EmulateADR, "add<c> <Rd>, PC, #<const>"},
12947 &EmulateInstructionARM::EmulateADR, "sub<c> <Rd>, PC, #<const>"},
12950 &EmulateInstructionARM::EmulateANDImm, "and{s}<c> <Rd>, <Rn>, #const"},
12953 &EmulateInstructionARM::EmulateANDReg,
12957 &EmulateInstructionARM::EmulateBICImm, "bic{s}<c> <Rd>, <Rn>, #const"},
12960 &EmulateInstructionARM::EmulateBICReg,
12964 &EmulateInstructionARM::EmulateEORImm, "eor{s}<c> <Rd>, <Rn>, #const"},
12967 &EmulateInstructionARM::EmulateEORReg,
12971 &EmulateInstructionARM::EmulateORRImm, "orr{s}<c> <Rd>, <Rn>, #const"},
12974 &EmulateInstructionARM::EmulateORRReg,
12978 &EmulateInstructionARM::EmulateRSBImm, "rsb{s}<c> <Rd>, <Rn>, #<const>"},
12981 &EmulateInstructionARM::EmulateRSBReg,
12985 &EmulateInstructionARM::EmulateRSCImm, "rsc{s}<c> <Rd>, <Rn>, #<const>"},
12988 &EmulateInstructionARM::EmulateRSCReg,
12992 &EmulateInstructionARM::EmulateSBCImm, "sbc{s}<c> <Rd>, <Rn>, #<const>"},
12995 &EmulateInstructionARM::EmulateSBCReg,
12999 &EmulateInstructionARM::EmulateSUBImmARM,
13003 &EmulateInstructionARM::EmulateSUBSPImm, "sub{s}<c> <Rd>, sp, #<const>"},
13006 &EmulateInstructionARM::EmulateSUBReg,
13010 &EmulateInstructionARM::EmulateTEQImm, "teq<c> <Rn>, #const"},
13013 &EmulateInstructionARM::EmulateTEQReg, "teq<c> <Rn>, <Rm> {,<shift>}"},
13016 &EmulateInstructionARM::EmulateTSTImm, "tst<c> <Rn>, #const"},
13019 &EmulateInstructionARM::EmulateTSTReg, "tst<c> <Rn>, <Rm> {,<shift>}"},
13023 &EmulateInstructionARM::EmulateMOVRdImm, "mov{s}<c> <Rd>, #<const>"},
13025 &EmulateInstructionARM::EmulateMOVRdImm, "movw<c> <Rd>, #<imm16>"},
13028 &EmulateInstructionARM::EmulateMOVRdRm, "mov{s}<c> <Rd>, <Rm>"},
13031 &EmulateInstructionARM::EmulateMVNImm, "mvn{s}<c> <Rd>, #<const>"},
13034 &EmulateInstructionARM::EmulateMVNReg,
13038 &EmulateInstructionARM::EmulateCMNImm, "cmn<c> <Rn>, #<const>"},
13041 &EmulateInstructionARM::EmulateCMNReg, "cmn<c> <Rn>, <Rm> {,<shift>}"},
13044 &EmulateInstructionARM::EmulateCMPImm, "cmp<c> <Rn>, #<const>"},
13047 &EmulateInstructionARM::EmulateCMPReg, "cmp<c> <Rn>, <Rm> {,<shift>}"},
13050 &EmulateInstructionARM::EmulateASRImm, "asr{s}<c> <Rd>, <Rm>, #imm"},
13053 &EmulateInstructionARM::EmulateASRReg, "asr{s}<c> <Rd>, <Rn>, <Rm>"},
13056 &EmulateInstructionARM::EmulateLSLImm, "lsl{s}<c> <Rd>, <Rm>, #imm"},
13059 &EmulateInstructionARM::EmulateLSLReg, "lsl{s}<c> <Rd>, <Rn>, <Rm>"},
13062 &EmulateInstructionARM::EmulateLSRImm, "lsr{s}<c> <Rd>, <Rm>, #imm"},
13065 &EmulateInstructionARM::EmulateLSRReg, "lsr{s}<c> <Rd>, <Rn>, <Rm>"},
13068 &EmulateInstructionARM::EmulateRRX, "rrx{s}<c> <Rd>, <Rm>"},
13071 &EmulateInstructionARM::EmulateRORImm, "ror{s}<c> <Rd>, <Rm>, #imm"},
13074 &EmulateInstructionARM::EmulateRORReg, "ror{s}<c> <Rd>, <Rn>, <Rm>"},
13077 &EmulateInstructionARM::EmulateMUL, "mul{s}<c> <Rd>,<R>,<Rm>"},
13081 &EmulateInstructionARM::EmulateSUBSPcLrEtc,
13084 &EmulateInstructionARM::EmulateSUBSPcLrEtc,
13089 &EmulateInstructionARM::EmulateLDM, "ldm<c> <Rn>{!} <registers>"},
13091 &EmulateInstructionARM::EmulateLDMDA, "ldmda<c> <Rn>{!} <registers>"},
13093 &EmulateInstructionARM::EmulateLDMDB, "ldmdb<c> <Rn>{!} <registers>"},
13095 &EmulateInstructionARM::EmulateLDMIB, "ldmib<c> <Rn<{!} <registers>"},
13097 &EmulateInstructionARM::EmulateLDRImmediateARM,
13100 &EmulateInstructionARM::EmulateLDRRegister,
13103 &EmulateInstructionARM::EmulateLDRBLiteral, "ldrb<c> <Rt>, [...]"},
13105 &EmulateInstructionARM::EmulateLDRBRegister,
13108 &EmulateInstructionARM::EmulateLDRHLiteral, "ldrh<c> <Rt>, <label>"},
13110 &EmulateInstructionARM::EmulateLDRHRegister,
13113 &EmulateInstructionARM::EmulateLDRSBImmediate,
13116 &EmulateInstructionARM::EmulateLDRSBLiteral, "ldrsb<c> <Rt> <label>"},
13118 &EmulateInstructionARM::EmulateLDRSBRegister,
13121 &EmulateInstructionARM::EmulateLDRSHImmediate,
13124 &EmulateInstructionARM::EmulateLDRSHLiteral, "ldrsh<c> <Rt>,<label>"},
13126 &EmulateInstructionARM::EmulateLDRSHRegister,
13129 &EmulateInstructionARM::EmulateLDRDImmediate,
13132 &EmulateInstructionARM::EmulateLDRDRegister,
13135 &EmulateInstructionARM::EmulateVLDM, "vldm{mode}<c> <Rn>{!}, <list>"},
13137 &EmulateInstructionARM::EmulateVLDM, "vldm{mode}<c> <Rn>{!}, <list>"},
13139 &EmulateInstructionARM::EmulateVLDR, "vldr<c> <Dd>, [<Rn>{,#+/-<imm>}]"},
13141 &EmulateInstructionARM::EmulateVLDR, "vldr<c> <Sd>, [<Rn>{,#+/-<imm>}]"},
13143 &EmulateInstructionARM::EmulateVLD1Multiple,
13146 &EmulateInstructionARM::EmulateVLD1Single,
13149 &EmulateInstructionARM::EmulateVLD1SingleAll,
13154 &EmulateInstructionARM::EmulateSTM, "stm<c> <Rn>{!} <registers>"},
13156 &EmulateInstructionARM::EmulateSTMDA, "stmda<c> <Rn>{!} <registers>"},
13158 &EmulateInstructionARM::EmulateSTMDB, "stmdb<c> <Rn>{!} <registers>"},
13160 &EmulateInstructionARM::EmulateSTMIB, "stmib<c> <Rn>{!} <registers>"},
13162 &EmulateInstructionARM::EmulateSTRRegister,
13165 &EmulateInstructionARM::EmulateSTRHRegister,
13168 &EmulateInstructionARM::EmulateSTREX, "strex<c> <Rd>, <Rt>, [<Rn>]"},
13170 &EmulateInstructionARM::EmulateSTRBImmARM,
13173 &EmulateInstructionARM::EmulateSTRImmARM,
13176 &EmulateInstructionARM::EmulateSTRDImm,
13179 &EmulateInstructionARM::EmulateSTRDReg,
13182 &EmulateInstructionARM::EmulateVSTM, "vstm{mode}<c> <Rn>{!} <list>"},
13184 &EmulateInstructionARM::EmulateVSTM, "vstm{mode}<c> <Rn>{!} <list>"},
13186 &EmulateInstructionARM::EmulateVSTR, "vstr<c> <Dd> [<Rn>{,#+/-<imm>}]"},
13188 &EmulateInstructionARM::EmulateVSTR, "vstr<c> <Sd> [<Rn>{,#+/-<imm>}]"},
13190 &EmulateInstructionARM::EmulateVST1Multiple,
13193 &EmulateInstructionARM::EmulateVST1Single,
13198 &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>{,<rotation>}"},
13200 &EmulateInstructionARM::EmulateSXTH, "sxth<c> <Rd>,<Rm>{,<rotation>}"},
13202 &EmulateInstructionARM::EmulateUXTB, "uxtb<c> <Rd>,<Rm>{,<rotation>}"},
13204 &EmulateInstructionARM::EmulateUXTH, "uxth<c> <Rd>,<Rm>{,<rotation>}"},
13206 &EmulateInstructionARM::EmulateRFE, "rfe{<amode>} <Rn>{!}"}
13219 EmulateInstructionARM::ARMOpcode *
13228 &EmulateInstructionARM::EmulatePUSH, "push <registers>"},
13230 &EmulateInstructionARM::EmulatePUSH, "push.w <registers>"},
13232 &EmulateInstructionARM::EmulatePUSH, "push.w <register>"},
13236 &EmulateInstructionARM::EmulateADDRdSPImm, "add r7, sp, #imm"},
13239 &EmulateInstructionARM::EmulateMOVRdSP, "mov r7, sp"},
13243 &EmulateInstructionARM::EmulateMOVLowHigh, "mov r0-r7, r8-r15"},
13247 &EmulateInstructionARM::EmulateLDRRtPCRelative, "ldr <Rt>, [PC, #imm]"},
13251 &EmulateInstructionARM::EmulateADDSPRm, "add sp, <Rm>"},
13253 &EmulateInstructionARM::EmulateSUBSPImm, "sub sp, sp, #imm"},
13255 &EmulateInstructionARM::EmulateSUBSPImm, "sub.w sp, sp, #<const>"},
13257 &EmulateInstructionARM::EmulateSUBSPImm, "subw sp, sp, #imm12"},
13259 &EmulateInstructionARM::EmulateSUBSPReg,
13264 &EmulateInstructionARM::EmulateVPUSH, "vpush.64 <list>"},
13266 &EmulateInstructionARM::EmulateVPUSH, "vpush.32 <list>"},
13271 &EmulateInstructionARM::EmulateADDSPImm, "add<c> <Rd>, sp, #imm"},
13273 &EmulateInstructionARM::EmulateADDSPImm, "add sp, #imm"},
13275 &EmulateInstructionARM::EmulatePOP, "pop <registers>"},
13277 &EmulateInstructionARM::EmulatePOP, "pop.w <registers>"},
13279 &EmulateInstructionARM::EmulatePOP, "pop.w <register>"},
13281 &EmulateInstructionARM::EmulateVPOP, "vpop.64 <list>"},
13283 &EmulateInstructionARM::EmulateVPOP, "vpop.32 <list>"},
13287 &EmulateInstructionARM::EmulateSVC, "svc #imm8"},
13292 &EmulateInstructionARM::EmulateNop, "nop"},
13294 &EmulateInstructionARM::EmulateNop, "nop YIELD (yield hint)"},
13296 &EmulateInstructionARM::EmulateNop, "nop WFE (wait for event hint)"},
13298 &EmulateInstructionARM::EmulateNop, "nop WFI (wait for interrupt hint)"},
13300 &EmulateInstructionARM::EmulateNop, "nop SEV (send event hint)"},
13302 &EmulateInstructionARM::EmulateIT, "it{<x>{<y>{<z>}}} <firstcond>"},
13307 &EmulateInstructionARM::EmulateB, "b<c> #imm8 (outside IT)"},
13309 &EmulateInstructionARM::EmulateB, "b<c> #imm11 (outside or last in IT)"},
13311 &EmulateInstructionARM::EmulateB, "b<c>.w #imm8 (outside IT)"},
13313 &EmulateInstructionARM::EmulateB,
13317 &EmulateInstructionARM::EmulateBLXImmediate, "bl <label>"},
13320 &EmulateInstructionARM::EmulateBLXImmediate, "blx <label>"},
13322 &EmulateInstructionARM::EmulateBLXRm, "blx <Rm>"},
13325 &EmulateInstructionARM::EmulateBXRm, "bx <Rm>"},
13328 &EmulateInstructionARM::EmulateBXJRm, "bxj <Rm>"},
13331 &EmulateInstructionARM::EmulateCB, "cb{n}z <Rn>, <label>"},
13334 &EmulateInstructionARM::EmulateTB, "tbb<c> <Rn>, <Rm>"},
13337 &EmulateInstructionARM::EmulateTB, "tbh<c> <Rn>, <Rm>, lsl #1"},
13342 &EmulateInstructionARM::EmulateADCImm, "adc{s}<c> <Rd>, <Rn>, #<const>"},
13345 &EmulateInstructionARM::EmulateADCReg, "adcs|adc<c> <Rdn>, <Rm>"},
13347 &EmulateInstructionARM::EmulateADCReg,
13351 &EmulateInstructionARM::EmulateADDReg, "adds|add<c> <Rd>, <Rn>, <Rm>"},
13355 &EmulateInstructionARM::EmulateADDReg, "add<c> <Rdn>, <Rm>"},
13358 &EmulateInstructionARM::EmulateADR, "add<c> <Rd>, PC, #<const>"},
13360 &EmulateInstructionARM::EmulateADR, "sub<c> <Rd>, PC, #<const>"},
13362 &EmulateInstructionARM::EmulateADR, "add<c> <Rd>, PC, #<const>"},
13365 &EmulateInstructionARM::EmulateANDImm, "and{s}<c> <Rd>, <Rn>, #<const>"},
13368 &EmulateInstructionARM::EmulateANDReg, "ands|and<c> <Rdn>, <Rm>"},
13370 &EmulateInstructionARM::EmulateANDReg,
13374 &EmulateInstructionARM::EmulateBICImm, "bic{s}<c> <Rd>, <Rn>, #<const>"},
13377 &EmulateInstructionARM::EmulateBICReg, "bics|bic<c> <Rdn>, <Rm>"},
13379 &EmulateInstructionARM::EmulateBICReg,
13383 &EmulateInstructionARM::EmulateEORImm, "eor{s}<c> <Rd>, <Rn>, #<const>"},
13386 &EmulateInstructionARM::EmulateEORReg, "eors|eor<c> <Rdn>, <Rm>"},
13388 &EmulateInstructionARM::EmulateEORReg,
13392 &EmulateInstructionARM::EmulateORRImm, "orr{s}<c> <Rd>, <Rn>, #<const>"},
13395 &EmulateInstructionARM::EmulateORRReg, "orrs|orr<c> <Rdn>, <Rm>"},
13397 &EmulateInstructionARM::EmulateORRReg,
13401 &EmulateInstructionARM::EmulateRSBImm, "rsbs|rsb<c> <Rd>, <Rn>, #0"},
13403 &EmulateInstructionARM::EmulateRSBImm,
13407 &EmulateInstructionARM::EmulateRSBReg,
13411 &EmulateInstructionARM::EmulateSBCImm, "sbc{s}<c> <Rd>, <Rn>, #<const>"},
13414 &EmulateInstructionARM::EmulateSBCReg, "sbcs|sbc<c> <Rdn>, <Rm>"},
13416 &EmulateInstructionARM::EmulateSBCReg,
13420 &EmulateInstructionARM::EmulateADDImmThumb,
13423 &EmulateInstructionARM::EmulateADDImmThumb, "adds|add<c> <Rdn>,#<imm8>"},
13425 &EmulateInstructionARM::EmulateADDImmThumb,
13428 &EmulateInstructionARM::EmulateADDImmThumb,
13432 &EmulateInstructionARM::EmulateSUBImmThumb,
13435 &EmulateInstructionARM::EmulateSUBImmThumb, "subs|sub<c> <Rdn>, #imm8"},
13437 &EmulateInstructionARM::EmulateSUBImmThumb,
13440 &EmulateInstructionARM::EmulateSUBImmThumb,
13444 &EmulateInstructionARM::EmulateSUBSPImm, "sub{s}.w <Rd>, sp, #<const>"},
13446 &EmulateInstructionARM::EmulateSUBSPImm, "subw<c> <Rd>, sp, #imm12"},
13449 &EmulateInstructionARM::EmulateSUBReg, "subs|sub<c> <Rd>, <Rn>, <Rm>"},
13451 &EmulateInstructionARM::EmulateSUBReg,
13455 &EmulateInstructionARM::EmulateTEQImm, "teq<c> <Rn>, #<const>"},
13458 &EmulateInstructionARM::EmulateTEQReg, "teq<c> <Rn>, <Rm> {,<shift>}"},
13461 &EmulateInstructionARM::EmulateTSTImm, "tst<c> <Rn>, #<const>"},
13464 &EmulateInstructionARM::EmulateTSTReg, "tst<c> <Rdn>, <Rm>"},
13466 &EmulateInstructionARM::EmulateTSTReg, "tst<c>.w <Rn>, <Rm> {,<shift>}"},
13470 &EmulateInstructionARM::EmulateMOVRdRm, "mov<c> <Rd>, <Rm>"},
13473 &EmulateInstructionARM::EmulateMOVRdRm, "movs <Rd>, <Rm>"},
13476 &EmulateInstructionARM::EmulateMOVRdRm, "mov{s}<c>.w <Rd>, <Rm>"},
13479 &EmulateInstructionARM::EmulateMOVRdImm, "movs|mov<c> <Rd>, #imm8"},
13481 &EmulateInstructionARM::EmulateMOVRdImm, "mov{s}<c>.w <Rd>, #<const>"},
13483 &EmulateInstructionARM::EmulateMOVRdImm, "movw<c> <Rd>,#<imm16>"},
13486 &EmulateInstructionARM::EmulateMVNImm, "mvn{s} <Rd>, #<const>"},
13489 &EmulateInstructionARM::EmulateMVNReg, "mvns|mvn<c> <Rd>, <Rm>"},
13491 &EmulateInstructionARM::EmulateMVNReg,
13495 &EmulateInstructionARM::EmulateCMNImm, "cmn<c> <Rn>, #<const>"},
13498 &EmulateInstructionARM::EmulateCMNReg, "cmn<c> <Rn>, <Rm>"},
13500 &EmulateInstructionARM::EmulateCMNReg, "cmn<c> <Rn>, <Rm> {,<shift>}"},
13503 &EmulateInstructionARM::EmulateCMPImm, "cmp<c> <Rn>, #imm8"},
13505 &EmulateInstructionARM::EmulateCMPImm, "cmp<c>.w <Rn>, #<const>"},
13508 &EmulateInstructionARM::EmulateCMPReg, "cmp<c> <Rn>, <Rm>"},
13511 &EmulateInstructionARM::EmulateCMPReg, "cmp<c> <Rn>, <Rm>"},
13513 &EmulateInstructionARM::EmulateCMPReg,
13517 &EmulateInstructionARM::EmulateASRImm, "asrs|asr<c> <Rd>, <Rm>, #imm"},
13519 &EmulateInstructionARM::EmulateASRImm, "asr{s}<c>.w <Rd>, <Rm>, #imm"},
13522 &EmulateInstructionARM::EmulateASRReg, "asrs|asr<c> <Rdn>, <Rm>"},
13524 &EmulateInstructionARM::EmulateASRReg, "asr{s}<c>.w <Rd>, <Rn>, <Rm>"},
13527 &EmulateInstructionARM::EmulateLSLImm, "lsls|lsl<c> <Rd>, <Rm>, #imm"},
13529 &EmulateInstructionARM::EmulateLSLImm, "lsl{s}<c>.w <Rd>, <Rm>, #imm"},
13532 &EmulateInstructionARM::EmulateLSLReg, "lsls|lsl<c> <Rdn>, <Rm>"},
13534 &EmulateInstructionARM::EmulateLSLReg, "lsl{s}<c>.w <Rd>, <Rn>, <Rm>"},
13537 &EmulateInstructionARM::EmulateLSRImm, "lsrs|lsr<c> <Rd>, <Rm>, #imm"},
13539 &EmulateInstructionARM::EmulateLSRImm, "lsr{s}<c>.w <Rd>, <Rm>, #imm"},
13542 &EmulateInstructionARM::EmulateLSRReg, "lsrs|lsr<c> <Rdn>, <Rm>"},
13544 &EmulateInstructionARM::EmulateLSRReg, "lsr{s}<c>.w <Rd>, <Rn>, <Rm>"},
13547 &EmulateInstructionARM::EmulateRRX, "rrx{s}<c>.w <Rd>, <Rm>"},
13550 &EmulateInstructionARM::EmulateRORImm, "ror{s}<c>.w <Rd>, <Rm>, #imm"},
13553 &EmulateInstructionARM::EmulateRORReg, "rors|ror<c> <Rdn>, <Rm>"},
13555 &EmulateInstructionARM::EmulateRORReg, "ror{s}<c>.w <Rd>, <Rn>, <Rm>"},
13558 &EmulateInstructionARM::EmulateMUL, "muls <Rdm>,<Rn>,<Rdm>"},
13561 &EmulateInstructionARM::EmulateMUL, "mul<c> <Rd>,<Rn>,<Rm>"},
13565 &EmulateInstructionARM::EmulateSUBSPcLrEtc, "SUBS<c> PC, LR, #<imm8>"},
13572 &EmulateInstructionARM::EmulateRFE, "rfedb<c> <Rn>{!}"},
13574 &EmulateInstructionARM::EmulateRFE, "rfe{ia}<c> <Rn>{!}"},
13578 &EmulateInstructionARM::EmulateLDM, "ldm<c> <Rn>{!} <registers>"},
13580 &EmulateInstructionARM::EmulateLDM, "ldm<c>.w <Rn>{!} <registers>"},
13582 &EmulateInstructionARM::EmulateLDMDB, "ldmdb<c> <Rn>{!} <registers>"},
13584 &EmulateInstructionARM::EmulateLDRRtRnImm, "ldr<c> <Rt>, [<Rn>{,#imm}]"},
13586 &EmulateInstructionARM::EmulateLDRRtRnImm, "ldr<c> <Rt>, [SP{,#imm}]"},
13588 &EmulateInstructionARM::EmulateLDRRtRnImm,
13591 &EmulateInstructionARM::EmulateLDRRtRnImm,
13595 &EmulateInstructionARM::EmulateLDRRtPCRelative,
13598 &EmulateInstructionARM::EmulateLDRRegister, "ldr<c> <Rt>, [<Rn>, <Rm>]"},
13600 &EmulateInstructionARM::EmulateLDRRegister,
13603 &EmulateInstructionARM::EmulateLDRBImmediate,
13606 &EmulateInstructionARM::EmulateLDRBImmediate,
13609 &EmulateInstructionARM::EmulateLDRBImmediate,
13612 &EmulateInstructionARM::EmulateLDRBLiteral, "ldrb<c> <Rt>,[...]"},
13614 &EmulateInstructionARM::EmulateLDRBRegister, "ldrb<c> <Rt>,[<Rn>,<Rm>]"},
13616 &EmulateInstructionARM::EmulateLDRBRegister,
13619 &EmulateInstructionARM::EmulateLDRHImmediate,
13622 &EmulateInstructionARM::EmulateLDRHImmediate,
13625 &EmulateInstructionARM::EmulateLDRHImmediate,
13628 &EmulateInstructionARM::EmulateLDRHLiteral, "ldrh<c> <Rt>, <label>"},
13630 &EmulateInstructionARM::EmulateLDRHRegister,
13633 &EmulateInstructionARM::EmulateLDRHRegister,
13636 &EmulateInstructionARM::EmulateLDRSBImmediate,
13639 &EmulateInstructionARM::EmulateLDRSBImmediate,
13642 &EmulateInstructionARM::EmulateLDRSBLiteral, "ldrsb<c> <Rt>, <label>"},
13644 &EmulateInstructionARM::EmulateLDRSBRegister,
13647 &EmulateInstructionARM::EmulateLDRSBRegister,
13650 &EmulateInstructionARM::EmulateLDRSHImmediate,
13653 &EmulateInstructionARM::EmulateLDRSHImmediate,
13656 &EmulateInstructionARM::EmulateLDRSHLiteral, "ldrsh<c> <Rt>,<label>"},
13658 &EmulateInstructionARM::EmulateLDRSHRegister,
13661 &EmulateInstructionARM::EmulateLDRSHRegister,
13664 &EmulateInstructionARM::EmulateLDRDImmediate,
13667 &EmulateInstructionARM::EmulateVLDM, "vldm{mode}<c> <Rn>{!}, <list>"},
13669 &EmulateInstructionARM::EmulateVLDM, "vldm{mode}<c> <Rn>{!}, <list>"},
13671 &EmulateInstructionARM::EmulateVLDR, "vldr<c> <Dd>, [<Rn>{,#+/-<imm>}]"},
13673 &EmulateInstructionARM::EmulateVLDR, "vldr<c> <Sd>, {<Rn>{,#+/-<imm>}]"},
13675 &EmulateInstructionARM::EmulateVLD1Multiple,
13678 &EmulateInstructionARM::EmulateVLD1Single,
13681 &EmulateInstructionARM::EmulateVLD1SingleAll,
13686 &EmulateInstructionARM::EmulateSTM, "stm<c> <Rn>{!} <registers>"},
13688 &EmulateInstructionARM::EmulateSTM, "stm<c>.w <Rn>{!} <registers>"},
13690 &EmulateInstructionARM::EmulateSTMDB, "stmdb<c> <Rn>{!} <registers>"},
13692 &EmulateInstructionARM::EmulateSTRThumb, "str<c> <Rt>, [<Rn>{,#<imm>}]"},
13694 &EmulateInstructionARM::EmulateSTRThumb, "str<c> <Rt>, [SP,#<imm>]"},
13696 &EmulateInstructionARM::EmulateSTRThumb,
13699 &EmulateInstructionARM::EmulateSTRThumb,
13702 &EmulateInstructionARM::EmulateSTRRegister, "str<c> <Rt> ,{<Rn>, <Rm>]"},
13704 &EmulateInstructionARM::EmulateSTRRegister,
13707 &EmulateInstructionARM::EmulateSTRBThumb,
13710 &EmulateInstructionARM::EmulateSTRBThumb,
13713 &EmulateInstructionARM::EmulateSTRBThumb,
13716 &EmulateInstructionARM::EmulateSTRHRegister, "strh<c> <Rt>,[<Rn>,<Rm>]"},
13718 &EmulateInstructionARM::EmulateSTRHRegister,
13721 &EmulateInstructionARM::EmulateSTREX,
13724 &EmulateInstructionARM::EmulateSTRDImm,
13727 &EmulateInstructionARM::EmulateVSTM, "vstm{mode}<c> <Rn>{!}, <list>"},
13729 &EmulateInstructionARM::EmulateVSTM, "vstm{mode}<c> <Rn>{!}, <list>"},
13731 &EmulateInstructionARM::EmulateVSTR, "vstr<c> <Dd>, [<Rn>{,#+/-<imm>}]"},
13733 &EmulateInstructionARM::EmulateVSTR, "vstr<c> <Sd>, [<Rn>{,#+/-<imm>}]"},
13735 &EmulateInstructionARM::EmulateVST1Multiple,
13738 &EmulateInstructionARM::EmulateVST1Single,
13743 &EmulateInstructionARM::EmulateSXTB, "sxtb<c> <Rd>,<Rm>"},
13745 &EmulateInstructionARM::EmulateSXTB, "sxtb<c>.w <Rd>,<Rm>{,<rotation>}"},
13747 &EmulateInstructionARM::EmulateSXTH, "sxth<c> <Rd>,<Rm>"},
13749 &EmulateInstructionARM::EmulateSXTH, "sxth<c>.w <Rd>,<Rm>{,<rotation>}"},
13751 &EmulateInstructionARM::EmulateUXTB, "uxtb<c> <Rd>,<Rm>"},
13753 &EmulateInstructionARM::EmulateUXTB, "uxtb<c>.w <Rd>,<Rm>{,<rotation>}"},
13755 &EmulateInstructionARM::EmulateUXTH, "uxth<c> <Rd>,<Rm>"},
13757 &EmulateInstructionARM::EmulateUXTH, "uxth<c>.w <Rd>,<Rm>{,<rotation>}"},
14136 EmulateInstructionARM::Mode EmulateInstructionARM::CurrentInstrSet() {
14171 EmulateInstructionARM::AddWithCarryResult
14358 opcode_data->callback != &EmulateInstructionARM::EmulateIT))
tools/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h 300 EmulateInstructionARM::ARMEncoding encoding;
usr/include/c++/7.4.0/bits/unique_ptr.h 68 default_delete(const default_delete<_Up>&) noexcept { }
72 operator()(_Tp* __ptr) const
74 static_assert(!is_void<_Tp>::value,
76 static_assert(sizeof(_Tp)>0,
122 using type = _Up*;
137 using pointer = typename _Ptr<_Tp, _Dp>::type;
161 typename __uniq_ptr_impl<_Tp, _Up>::_DeleterConstraint::type;
163 __uniq_ptr_impl<_Tp, _Dp> _M_t;
166 using pointer = typename __uniq_ptr_impl<_Tp, _Dp>::pointer;
167 using element_type = _Tp;
usr/include/c++/7.4.0/type_traits 215 : public __is_void_helper<typename remove_cv<_Tp>::type>::type
581 : public __or_<is_lvalue_reference<_Tp>,
582 is_rvalue_reference<_Tp>>::type
601 : public __not_<__or_<is_function<_Tp>, is_reference<_Tp>,
601 : public __not_<__or_<is_function<_Tp>, is_reference<_Tp>,
602 is_void<_Tp>>>::type
638 : public __or_<is_object<_Tp>, is_reference<_Tp>>::type
638 : public __or_<is_object<_Tp>, is_reference<_Tp>>::type
1554 { typedef _Tp type; };
1563 { typedef _Tp type; };
1574 remove_const<typename remove_volatile<_Tp>::type>::type type;
1645 { typedef _Tp& type; };
1650 : public __add_lvalue_reference_helper<_Tp>