|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
tools/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h 102 bool Emulate_LDST_Imm(llvm::MCInst &insn);
References
tools/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp 693 {"LB", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
695 {"LBE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
697 {"LBU", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
699 {"LBUE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
701 {"LDC1", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
703 {"LDL", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
705 {"LDR", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
707 {"LLD", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
709 {"LDC2", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
713 {"LH", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
715 {"LHE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
717 {"LHU", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
719 {"LHUE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
721 {"LL", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
723 {"LLE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
727 {"LW", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
729 {"LWC1", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
731 {"LWC2", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
733 {"LWE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
735 {"LWL", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
737 {"LWLE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
739 {"LWR", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
741 {"LWRE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
746 {"SB", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
748 {"SBE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
750 {"SC", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
752 {"SCE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
754 {"SCD", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
756 {"SDL", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
758 {"SDR", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
760 {"SDC1", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
762 {"SDC2", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
766 {"SH", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
768 {"SHE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
772 {"SW", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
774 {"SWC1", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
776 {"SWC2", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
778 {"SWE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
780 {"SWL", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
782 {"SWLE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
784 {"SWR", &EmulateInstructionMIPS64::Emulate_LDST_Imm,
786 {"SWRE", &EmulateInstructionMIPS64::Emulate_LDST_Imm,