reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

utils/TableGen/AsmMatcherEmitter.cpp
 1305       CI->ClassName = RC.getName();
 1306       CI->Name = "MCK_" + RC.getName();
 1307       CI->ValueName = RC.getName();
 1309       CI->ValueName = CI->ValueName + "," + RC.getName();
 1322       CI->DiagnosticType = RC.getName();
utils/TableGen/CodeGenRegisters.cpp
  928   return StringRef(A->getName()) < B->getName();
  928   return StringRef(A->getName()) < B->getName();
  933     return getName();
  935     return (Namespace + "::" + getName()).str();
 1887     RegUnitSets.back().Name = RC.getName();
 1995     LLVM_DEBUG(dbgs() << "RC " << RC.getName() << " Units: \n";
 2158                         RC1->getName() + "_and_" + RC2->getName());
 2158                         RC1->getName() + "_and_" + RC2->getName());
 2207                           RC->getName() + "_with_" + I->first->getName());
 2274       getOrCreateSubClass(RC, &SubSetVec, RC->getName() + "_with_" +
 2276                                           SubRC.getName());
utils/TableGen/CodeGenTarget.cpp
  341     return StringRef(A->getName()) < B->getName();
  341     return StringRef(A->getName()) < B->getName();
utils/TableGen/FastISelEmitter.cpp
  673       OS << "&" << InstNS << "::" << Memo.RC->getName() << "RegClass";
utils/TableGen/GlobalISelEmitter.cpp
 2920           << MatchTable::Comment("RC " + RC.getName())
utils/TableGen/RegisterBankEmitter.cpp
  185         (Twine(Kind) + " (" + PossibleSubclass.getName() + ")").str();
  190                                TmpKind + " " + RC->getName() + " subclass",
  203         std::string TmpKind2 = (Twine(TmpKind) + " " + RC->getName() +
  204                                 " class-with-subregs: " + RC->getName())
  231             (Twine(RC->Namespace) + "::" + RC->getName() + "RegClassID").str();
  294                        << "Added " << RC->getName() << "(" << Kind << ")\n");
utils/TableGen/RegisterInfoEmitter.cpp
  147       OS << "  " << RC.getName() << "RegClassID"
  213     OS << "},  \t// " << RC.getName() << "\n";
 1041     const std::string &Name = RC.getName();
 1077     OS << "  { " << RC.getName() << ", " << RC.getName() << "Bits, "
 1077     OS << "  { " << RC.getName() << ", " << RC.getName() << "Bits, "
 1078        << RegClassStrings.get(RC.getName()) << ", "
 1079        << RC.getOrder().size() << ", sizeof(" << RC.getName() << "Bits), "
 1185       const std::string &Name = RC.getName();
 1288            << RC.getName() << '\n';
 1322       OS << "static const uint32_t " << RC.getName()
 1357          << RC.getName() << "Superclasses[] = {\n";
 1366         OS << "\nstatic inline unsigned " << RC.getName()
 1369            << "static ArrayRef<MCPhysReg> " << RC.getName()
 1389         OS << ")\n  };\n  const unsigned Select = " << RC.getName()
 1400       OS << "  extern const TargetRegisterClass " << RC.getName()
 1402          << "MCRegisterClasses[" << RC.getName() << "RegClassID],\n    "
 1403          << RC.getName() << "SubClassMask,\n    SuperRegIdxSeqs + "
 1414         OS << RC.getName() << "Superclasses,\n    ";
 1418         OS << RC.getName() << "GetRawAllocationOrder\n";
 1473       OS << "    {\t// " << RC.getName() << "\n";
 1477              << " -> " << SRC->getName() << "\n";
 1626     OS << "RegisterClass " << RC.getName() << ":\n";
 1647       OS << " " << SRC.getName();
 1652       OS << " " << SRC->getName();