reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
810 "defined for processor " + ProcModel.ModelName + 940 LLVM_DEBUG(dbgs() << "InstRW on " << ProcModel.ModelName << " for " 960 << " on processor " << PM.ModelName << '\n'; 1260 + " in ItinResources for " + PM.ModelName); 1477 PM.ModelName + 1965 PrintError(Inst->TheDef->getLoc(), "'" + ProcModel.ModelName + 2000 + " in ItinResources for " + PM.ModelName); 2147 "the ProcResources list for " + ModelName); 2164 dbgs() << Index << ": " << ModelName << " "utils/TableGen/SubtargetEmitter.cpp
279 SchedModels.getModelForProc(Processor).ModelName; 621 OS << "\nstatic const unsigned " << ProcModel.ModelName 660 OS << ProcModel.ModelName << "RegisterFiles,\n " << (1 + NumRegisterFiles); 666 OS << ProcModel.ModelName << "RegisterCosts,\n "; 682 OS << "static const llvm::MCRegisterCostEntry " << ProcModel.ModelName 705 OS << "static const llvm::MCRegisterFileDesc " << ProcModel.ModelName 756 OS << "\nstatic const llvm::MCExtraProcessorInfo " << ProcModel.ModelName 778 OS << "static const llvm::MCProcResourceDesc " << ProcModel.ModelName 815 OS << ProcModel.ModelName << "ProcResourceSubUnits + " 849 "defined for processor " + ProcModel.ModelName + 866 ProcModel.ModelName); 901 "defined for processor " + ProcModel.ModelName + 918 ProcModel.ModelName); 1057 LLVM_DEBUG(dbgs() << ProcModel.ModelName 1307 << PI->ModelName << "SchedClasses[] = {\n"; 1334 OS << "}; // " << PI->ModelName << "SchedClasses\n"; 1353 OS << "static const llvm::MCSchedModel " << PM.ModelName << " = {\n"; 1375 OS << " " << PM.ModelName << "ProcResources" << ",\n" 1376 << " " << PM.ModelName << "SchedClasses" << ",\n" 1388 OS << " &" << PM.ModelName << "ExtraInfo,\n"; 1594 OS << "{ // " << (SchedModels.procModelBegin() + PI)->ModelName << '\n';