|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc99518 /*224148*/ /*SwitchOpcode*/ 52|128,2/*308*/, TARGET_VAL(ISD::ABS),// ->224460
gen/lib/Target/AArch64/AArch64GenFastISel.inc 4269 case ISD::ABS: return fastEmit_ISD_ABS_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/ARM/ARMGenDAGISel.inc46839 /*103898*/ /*SwitchOpcode*/ 27|128,2/*283*/, TARGET_VAL(ISD::ABS),// ->104185
gen/lib/Target/ARM/ARMGenFastISel.inc 2703 case ISD::ABS: return fastEmit_ISD_ABS_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc67501 /*129877*/ /*SwitchOpcode*/ 21, TARGET_VAL(ISD::ABS),// ->129901
gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc68754 /*145332*/ /*SwitchOpcode*/ 30, TARGET_VAL(ISD::ABS),// ->145365
gen/lib/Target/X86/X86GenDAGISel.inc79993 /*167893*/ /*SwitchOpcode*/ 115, TARGET_VAL(ISD::ABS),// ->168011
84953 /*177931*/ /*SwitchOpcode*/ 115, TARGET_VAL(ISD::ABS),// ->178049
90651 /*189017*/ /*SwitchOpcode*/ 126, TARGET_VAL(ISD::ABS),// ->189146
96753 /*201495*/ /*SwitchOpcode*/ 124, TARGET_VAL(ISD::ABS),// ->201622
103762 /*215223*/ /*SwitchOpcode*/ 18|128,1/*146*/, TARGET_VAL(ISD::ABS),// ->215373
110924 /*230002*/ /*SwitchOpcode*/ 17|128,1/*145*/, TARGET_VAL(ISD::ABS),// ->230151
117229 /*242275*/ /*SwitchOpcode*/ 125, TARGET_VAL(ISD::ABS),// ->242403
119357 /*246397*/ /*SwitchOpcode*/ 63, TARGET_VAL(ISD::ABS),// ->246463
122318 /*252340*/ /*SwitchOpcode*/ 108, TARGET_VAL(ISD::ABS),// ->252451
125352 /*257880*/ /*SwitchOpcode*/ 43, TARGET_VAL(ISD::ABS),// ->257926
127675 /*262448*/ /*SwitchOpcode*/ 44, TARGET_VAL(ISD::ABS),// ->262495
146248 /*299018*/ OPC_CheckOpcode, TARGET_VAL(ISD::ABS),
148065 /*302545*/ /*SwitchOpcode*/ 44, TARGET_VAL(ISD::ABS),// ->302592
160217 /*325426*/ /*SwitchOpcode*/ 31, TARGET_VAL(ISD::ABS),// ->325460
161869 /*328650*/ /*SwitchOpcode*/ 31, TARGET_VAL(ISD::ABS),// ->328684
177767 /*360289*/ /*SwitchOpcode*/ 17, TARGET_VAL(ISD::ABS),// ->360309
178654 /*361957*/ /*SwitchOpcode*/ 16, TARGET_VAL(ISD::ABS),// ->361976
187538 /*378960*/ /*SwitchOpcode*/ 31, TARGET_VAL(ISD::ABS),// ->378994
188275 /*380405*/ /*SwitchOpcode*/ 31, TARGET_VAL(ISD::ABS),// ->380439
188782 /*381351*/ /*SwitchOpcode*/ 17, TARGET_VAL(ISD::ABS),// ->381371
189088 /*381924*/ /*SwitchOpcode*/ 16, TARGET_VAL(ISD::ABS),// ->381943
221295 /*450151*/ /*SwitchOpcode*/ 2|128,7/*898*/, TARGET_VAL(ISD::ABS),// ->451053
gen/lib/Target/X86/X86GenFastISel.inc 5903 case ISD::ABS: return fastEmit_ISD_ABS_r(VT, RetVT, Op0, Op0IsKill);
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 1538 case ISD::ABS: return visitABS(N);
3097 if (TLI.isOperationLegalOrCustom(ISD::ABS, VT)) {
3105 return DAG.getNode(ISD::ABS, SDLoc(N), VT, S0);
6998 if (TLI.isOperationLegalOrCustom(ISD::ABS, VT)) {
7008 return DAG.getNode(ISD::ABS, DL, VT, S0);
8017 return DAG.getNode(ISD::ABS, SDLoc(N), VT, N0);
8019 if (N0.getOpcode() == ISD::ABS)
8712 if (TLI.isOperationLegalOrCustom(ISD::ABS, VT))
8713 return DAG.getNode(ISD::ABS, DL, VT, LHS);
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 2660 case ISD::ABS:
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 161 case ISD::ABS: Res = PromoteIntRes_ABS(N); break;
1028 return DAG.getNode(ISD::ABS, SDLoc(N), Op0.getValueType(), Op0);
1692 case ISD::ABS: ExpandIntRes_ABS(N, Lo, Hi); break;
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp 385 case ISD::ABS:
796 case ISD::ABS:
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 71 case ISD::ABS:
884 case ISD::ABS:
2885 case ISD::ABS:
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 3223 case ISD::ABS: {
4320 case ISD::ABS:
4442 case ISD::ABS:
4602 case ISD::ABS:
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 3328 Opc = ISD::ABS;
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 383 case ISD::ABS: return "abs";
lib/CodeGen/TargetLoweringBase.cpp 646 setOperationAction(ISD::ABS, VT, Expand);
lib/Target/AArch64/AArch64ISelLowering.cpp 873 setOperationAction(ISD::ABS, VT, Legal);
2834 Result = DAG.getNode(ISD::ABS, dl, MVT::v1i64, Result);
2837 return DAG.getNode(ISD::ABS, dl, Ty, Op.getOperand(1));
lib/Target/ARM/ARMISelLowering.cpp 210 for (auto Opcode : {ISD::ABS, ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX})
260 setOperationAction(ISD::ABS, VT, Legal);
1455 setTargetDAGCombine(ISD::ABS);
3702 return DAG.getNode(ISD::ABS, SDLoc(Op), Op.getValueType(),
9321 case ISD::ABS:
14420 case ISD::ABS: return PerformABSCombine(N, DCI, Subtarget);
lib/Target/Hexagon/HexagonISelLowering.cpp 1336 setOperationAction(ISD::ABS, MVT::i32, Legal);
1337 setOperationAction(ISD::ABS, MVT::i64, Legal);
lib/Target/NVPTX/NVPTXISelLowering.cpp 495 setOperationAction(ISD::ABS, Ty, Legal);
lib/Target/PowerPC/PPCISelLowering.cpp 677 setOperationAction(ISD::ABS, VT, Custom);
710 setOperationAction(ISD::ABS, MVT::v2i64, Expand);
1149 setTargetDAGCombine(ISD::ABS);
9998 assert(Op.getOpcode() == ISD::ABS && "Should only be called for ISD::ABS");
10162 case ISD::ABS: return LowerABS(Op, DAG);
13836 return DAG.getNode(ISD::ABS, dl, V2.getValueType(), V2);
13842 return DAG.getNode(ISD::ABS, dl, V1.getValueType(), V1);
13848 return DAG.getNode(ISD::ABS, dl, V1.getValueType(), V1);
14084 case ISD::ABS:
15472 assert((N->getOpcode() == ISD::ABS) && "Need ABS node here");
lib/Target/X86/X86ISelLowering.cpp 207 setOperationAction(ISD::ABS , MVT::i16 , Custom);
208 setOperationAction(ISD::ABS , MVT::i32 , Custom);
210 setOperationAction(ISD::ABS , MVT::i64 , Custom);
899 setOperationAction(ISD::ABS, VT, Custom);
1014 setOperationAction(ISD::ABS, MVT::v16i8, Legal);
1015 setOperationAction(ISD::ABS, MVT::v8i16, Legal);
1016 setOperationAction(ISD::ABS, MVT::v4i32, Legal);
1204 setOperationAction(ISD::ABS, MVT::v4i64, Custom);
1220 setOperationAction(ISD::ABS, VT, HasInt256 ? Legal : Custom);
1454 setOperationAction(ISD::ABS, VT, Legal);
1548 setOperationAction(ISD::ABS, VT, Legal);
1670 setOperationAction(ISD::ABS, VT, Legal);
27774 case ISD::ABS: return LowerABS(Op, Subtarget, DAG);
27897 case ISD::ABS: {
35994 if (!Root || Root.getOpcode() != ISD::ABS)
43784 if (AbsOp.getOpcode() != ISD::ABS)
43786 if (AbsOp.getOpcode() != ISD::ABS)