reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc
50835 /*109521*/        OPC_CheckChild2CondCode, ISD::SETULE,
51337 /*110890*/        OPC_CheckChild2CondCode, ISD::SETULE,
51839 /*112259*/        OPC_CheckChild2CondCode, ISD::SETULE,
52021 /*112702*/        OPC_CheckChild2CondCode, ISD::SETULE,
52281 /*113325*/        OPC_CheckChild2CondCode, ISD::SETULE,
52541 /*113948*/        OPC_CheckChild2CondCode, ISD::SETULE,
60405 /*132150*/        OPC_CheckChild2CondCode, ISD::SETULE,
60549 /*132412*/        OPC_CheckChild2CondCode, ISD::SETULE,
60812 /*132892*/        OPC_CheckChild2CondCode, ISD::SETULE,
61059 /*133436*/        OPC_CheckChild2CondCode, ISD::SETULE,
61516 /*134533*/        OPC_CheckChild2CondCode, ISD::SETULE,
61990 /*135664*/        OPC_CheckChild2CondCode, ISD::SETULE,
62236 /*136189*/        OPC_CheckChild2CondCode, ISD::SETULE,
gen/lib/Target/BPF/BPFGenDAGISel.inc
 2077 return (N->getZExtValue() == ISD::SETULE);
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc
29048 /* 56056*/          OPC_CheckChild2CondCode, ISD::SETULE,
29068 /* 56095*/        OPC_CheckChild2CondCode, ISD::SETULE,
29164 /* 56283*/            OPC_CheckChild2CondCode, ISD::SETULE,
29207 /* 56367*/              OPC_CheckChild2CondCode, ISD::SETULE,
29675 /* 57261*/          OPC_CheckChild2CondCode, ISD::SETULE,
29830 /* 57568*/          OPC_CheckChild2CondCode, ISD::SETULE,
29905 /* 57722*/          OPC_CheckChild2CondCode, ISD::SETULE,
30012 /* 57937*/            OPC_CheckChild2CondCode, ISD::SETULE,
30120 /* 58153*/            OPC_CheckChild2CondCode, ISD::SETULE,
30228 /* 58369*/            OPC_CheckChild2CondCode, ISD::SETULE,
30378 /* 58689*/          OPC_CheckChild2CondCode, ISD::SETULE,
30533 /* 59035*/          OPC_CheckChild2CondCode, ISD::SETULE,
30997 /* 59872*/          OPC_CheckChild2CondCode, ISD::SETULE,
51633 /* 97272*/            OPC_CheckChild2CondCode, ISD::SETULE,
51789 /* 97551*/            OPC_CheckChild2CondCode, ISD::SETULE,
gen/lib/Target/Mips/MipsGenDAGISel.inc
 2382 /*  4251*/              OPC_CheckChild2CondCode, ISD::SETULE,
 2450 /*  4387*/              OPC_CheckChild2CondCode, ISD::SETULE,
 2515 /*  4511*/              OPC_CheckChild2CondCode, ISD::SETULE,
 2898 /*  5199*/              OPC_CheckChild2CondCode, ISD::SETULE,
 4610 /*  8783*/          OPC_CheckChild2CondCode, ISD::SETULE,
 4675 /*  8918*/          OPC_CheckChild2CondCode, ISD::SETULE,
 4762 /*  9103*/          OPC_CheckChild2CondCode, ISD::SETULE,
 4840 /*  9265*/          OPC_CheckChild2CondCode, ISD::SETULE,
 4934 /*  9446*/          OPC_CheckChild2CondCode, ISD::SETULE,
 5010 /*  9594*/          OPC_CheckChild2CondCode, ISD::SETULE,
 5062 /*  9702*/          OPC_CheckChild2CondCode, ISD::SETULE,
 5746 /* 11094*/            OPC_CheckChild2CondCode, ISD::SETULE,
 5830 /* 11268*/            OPC_CheckChild2CondCode, ISD::SETULE,
 5914 /* 11442*/            OPC_CheckChild2CondCode, ISD::SETULE,
 5998 /* 11616*/            OPC_CheckChild2CondCode, ISD::SETULE,
 6082 /* 11790*/            OPC_CheckChild2CondCode, ISD::SETULE,
 6360 /* 12342*/            OPC_CheckChild2CondCode, ISD::SETULE,
 6444 /* 12516*/            OPC_CheckChild2CondCode, ISD::SETULE,
16744 /* 31124*/          OPC_CheckChild2CondCode, ISD::SETULE,
16810 /* 31280*/          OPC_CheckChild2CondCode, ISD::SETULE,
16938 /* 31576*/          OPC_CheckChild2CondCode, ISD::SETULE,
17087 /* 31893*/          OPC_CheckChild2CondCode, ISD::SETULE,
17168 /* 32059*/        OPC_CheckChild2CondCode, ISD::SETULE,
17252 /* 32215*/        OPC_CheckChild2CondCode, ISD::SETULE,
17421 /* 32572*/        OPC_CheckChild2CondCode, ISD::SETULE,
17505 /* 32728*/        OPC_CheckChild2CondCode, ISD::SETULE,
17648 /* 33039*/        OPC_CheckChild2CondCode, ISD::SETULE,
17686 /* 33113*/        OPC_CheckChild2CondCode, ISD::SETULE,
17728 /* 33193*/        OPC_CheckChild2CondCode, ISD::SETULE,
17766 /* 33267*/        OPC_CheckChild2CondCode, ISD::SETULE,
17808 /* 33347*/        OPC_CheckChild2CondCode, ISD::SETULE,
17846 /* 33421*/        OPC_CheckChild2CondCode, ISD::SETULE,
17888 /* 33501*/        OPC_CheckChild2CondCode, ISD::SETULE,
17926 /* 33575*/        OPC_CheckChild2CondCode, ISD::SETULE,
17994 /* 33701*/        OPC_CheckChild2CondCode, ISD::SETULE,
18097 /* 33892*/        OPC_CheckChild2CondCode, ISD::SETULE,
29410 /* 55656*/        OPC_CheckCondCode, ISD::SETULE,
29601 /* 56251*/        OPC_CheckChild2CondCode, ISD::SETULE,
gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc
60264 /*127618*/      OPC_CheckChild2CondCode, ISD::SETULE,
60278 /*127645*/      OPC_CheckChild2CondCode, ISD::SETULE,
60292 /*127672*/      OPC_CheckChild2CondCode, ISD::SETULE,
60306 /*127699*/      OPC_CheckChild2CondCode, ISD::SETULE,
60320 /*127726*/      OPC_CheckChild2CondCode, ISD::SETULE,
60334 /*127753*/      OPC_CheckChild2CondCode, ISD::SETULE,
60348 /*127780*/      OPC_CheckChild2CondCode, ISD::SETULE,
60362 /*127807*/      OPC_CheckChild2CondCode, ISD::SETULE,
60376 /*127834*/      OPC_CheckChild2CondCode, ISD::SETULE,
60390 /*127861*/      OPC_CheckChild2CondCode, ISD::SETULE,
60404 /*127888*/      OPC_CheckChild2CondCode, ISD::SETULE,
60418 /*127915*/      OPC_CheckChild2CondCode, ISD::SETULE,
62136 /*131290*/      OPC_CheckChild2CondCode, ISD::SETULE,
62160 /*131338*/      OPC_CheckChild2CondCode, ISD::SETULE,
62184 /*131386*/      OPC_CheckChild2CondCode, ISD::SETULE,
62198 /*131413*/      OPC_CheckChild2CondCode, ISD::SETULE,
62212 /*131440*/      OPC_CheckChild2CondCode, ISD::SETULE,
62236 /*131488*/      OPC_CheckChild2CondCode, ISD::SETULE,
62260 /*131536*/      OPC_CheckChild2CondCode, ISD::SETULE,
62274 /*131563*/      OPC_CheckChild2CondCode, ISD::SETULE,
64852 /*136894*/      OPC_CheckChild2CondCode, ISD::SETULE,
64881 /*136958*/      OPC_CheckChild2CondCode, ISD::SETULE,
64910 /*137022*/      OPC_CheckChild2CondCode, ISD::SETULE,
64939 /*137086*/      OPC_CheckChild2CondCode, ISD::SETULE,
66261 /*140005*/        OPC_CheckChild2CondCode, ISD::SETULE,
66445 /*140408*/        OPC_CheckChild2CondCode, ISD::SETULE,
66629 /*140811*/        OPC_CheckChild2CondCode, ISD::SETULE,
67048 /*141733*/        OPC_CheckChild2CondCode, ISD::SETULE,
67734 /*143204*/        OPC_CheckChild2CondCode, ISD::SETULE,
68236 /*144289*/        OPC_CheckChild2CondCode, ISD::SETULE,
gen/lib/Target/PowerPC/PPCGenDAGISel.inc
 4336 /*  9571*/                  OPC_CheckChild2CondCode, ISD::SETULE,
 4644 /* 10413*/                OPC_CheckChild2CondCode, ISD::SETULE,
 5169 /* 11800*/                  OPC_CheckChild2CondCode, ISD::SETULE,
 5478 /* 12644*/                OPC_CheckChild2CondCode, ISD::SETULE,
 5687 /* 13215*/              OPC_CheckChild2CondCode, ISD::SETULE,
 5981 /* 14020*/              OPC_CheckChild2CondCode, ISD::SETULE,
 6237 /* 14717*/              OPC_CheckChild2CondCode, ISD::SETULE,
 6531 /* 15522*/              OPC_CheckChild2CondCode, ISD::SETULE,
 6787 /* 16219*/              OPC_CheckChild2CondCode, ISD::SETULE,
 7991 /* 19337*/                  OPC_CheckChild2CondCode, ISD::SETULE,
 8299 /* 20179*/                OPC_CheckChild2CondCode, ISD::SETULE,
 8824 /* 21566*/                  OPC_CheckChild2CondCode, ISD::SETULE,
 9133 /* 22410*/                OPC_CheckChild2CondCode, ISD::SETULE,
 9342 /* 22981*/              OPC_CheckChild2CondCode, ISD::SETULE,
 9636 /* 23786*/              OPC_CheckChild2CondCode, ISD::SETULE,
 9892 /* 24483*/              OPC_CheckChild2CondCode, ISD::SETULE,
10186 /* 25288*/              OPC_CheckChild2CondCode, ISD::SETULE,
10442 /* 25985*/              OPC_CheckChild2CondCode, ISD::SETULE,
10960 /* 27386*/              OPC_CheckChild2CondCode, ISD::SETULE,
11268 /* 28360*/            OPC_CheckChild2CondCode, ISD::SETULE,
11485 /* 29041*/              OPC_CheckChild2CondCode, ISD::SETULE,
11794 /* 30017*/            OPC_CheckChild2CondCode, ISD::SETULE,
12002 /* 30682*/            OPC_CheckChild2CondCode, ISD::SETULE,
12296 /* 31620*/            OPC_CheckChild2CondCode, ISD::SETULE,
12552 /* 32431*/            OPC_CheckChild2CondCode, ISD::SETULE,
12846 /* 33369*/            OPC_CheckChild2CondCode, ISD::SETULE,
13102 /* 34180*/            OPC_CheckChild2CondCode, ISD::SETULE,
19310 /* 48801*/            OPC_CheckChild2CondCode, ISD::SETULE,
19425 /* 49113*/            OPC_CheckChild2CondCode, ISD::SETULE,
19671 /* 49741*/            OPC_CheckChild2CondCode, ISD::SETULE,
19735 /* 49928*/            OPC_CheckChild2CondCode, ISD::SETULE,
19801 /* 50119*/            OPC_CheckChild2CondCode, ISD::SETULE,
19892 /* 50385*/            OPC_CheckChild2CondCode, ISD::SETULE,
19974 /* 50620*/            OPC_CheckChild2CondCode, ISD::SETULE,
20065 /* 50886*/            OPC_CheckChild2CondCode, ISD::SETULE,
20147 /* 51121*/            OPC_CheckChild2CondCode, ISD::SETULE,
25246 /* 60794*/          OPC_CheckChild2CondCode, ISD::SETULE,
25459 /* 61376*/        OPC_CheckChild2CondCode, ISD::SETULE,
25656 /* 61879*/          OPC_CheckChild2CondCode, ISD::SETULE,
25853 /* 62419*/        OPC_CheckChild2CondCode, ISD::SETULE,
25927 /* 62613*/        OPC_CheckChild2CondCode, ISD::SETULE,
26138 /* 63113*/        OPC_CheckChild2CondCode, ISD::SETULE,
26257 /* 63470*/        OPC_CheckChild2CondCode, ISD::SETULE,
26494 /* 64097*/        OPC_CheckChild2CondCode, ISD::SETULE,
26613 /* 64454*/        OPC_CheckChild2CondCode, ISD::SETULE,
26790 /* 64937*/        OPC_CheckChild2CondCode, ISD::SETULE,
27025 /* 65556*/        OPC_CheckChild2CondCode, ISD::SETULE,
27235 /* 66085*/        OPC_CheckChild2CondCode, ISD::SETULE,
28753 /* 69048*/      OPC_CheckCondCode, ISD::SETULE,
28895 /* 69439*/      OPC_CheckCondCode, ISD::SETULE,
28995 /* 69669*/      OPC_CheckCondCode, ISD::SETULE,
29098 /* 69905*/      OPC_CheckCondCode, ISD::SETULE,
29208 /* 70155*/      OPC_CheckCondCode, ISD::SETULE,
29318 /* 70405*/      OPC_CheckCondCode, ISD::SETULE,
29428 /* 70655*/      OPC_CheckCondCode, ISD::SETULE,
29538 /* 70905*/      OPC_CheckCondCode, ISD::SETULE,
29648 /* 71155*/      OPC_CheckCondCode, ISD::SETULE,
29755 /* 71399*/      OPC_CheckCondCode, ISD::SETULE,
29858 /* 71635*/      OPC_CheckCondCode, ISD::SETULE,
29965 /* 71879*/      OPC_CheckCondCode, ISD::SETULE,
30068 /* 72115*/      OPC_CheckCondCode, ISD::SETULE,
30178 /* 72365*/      OPC_CheckCondCode, ISD::SETULE,
30288 /* 72615*/      OPC_CheckCondCode, ISD::SETULE,
gen/lib/Target/RISCV/RISCVGenDAGISel.inc
 6927 /* 12819*/          OPC_CheckChild2CondCode, ISD::SETULE,
 7126 /* 13248*/          OPC_CheckChild2CondCode, ISD::SETULE,
 7866 /* 14733*/          OPC_CheckChild2CondCode, ISD::SETULE,
 8008 /* 14964*/          OPC_CheckChild2CondCode, ISD::SETULE,
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc
 7633 /* 14156*/              OPC_CheckChild2CondCode, ISD::SETULE,
 7706 /* 14288*/              OPC_CheckChild2CondCode, ISD::SETULE,
 7931 /* 14700*/          OPC_CheckChild2CondCode, ISD::SETULE,
 8005 /* 14838*/          OPC_CheckChild2CondCode, ISD::SETULE,
 8080 /* 14979*/            OPC_CheckChild2CondCode, ISD::SETULE,
gen/lib/Target/XCore/XCoreGenDAGISel.inc
 1432 /*  2389*/          OPC_CheckChild2CondCode, ISD::SETULE,
 1590 /*  2697*/          OPC_CheckChild2CondCode, ISD::SETULE,
 1810 /*  3149*/        OPC_CheckChild2CondCode, ISD::SETULE,
include/llvm/CodeGen/ISDOpcodes.h
 1060     return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
lib/CodeGen/Analysis.cpp
  216   case FCmpInst::FCMP_ULE:   return ISD::SETULE;
  228     case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE;
  243   case ICmpInst::ICMP_ULE: return ISD::SETULE;
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 8145   case ISD::SETULE: {
12292       case ISD::SETULE:
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 1691     case ISD::SETULE:
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 1276   case ISD::SETULE:
 3691   case ISD::SETULE: LowCC = ISD::SETULE; break;
 3691   case ISD::SETULE: LowCC = ISD::SETULE; break;
 3725                     CCCode == ISD::SETUGE || CCCode == ISD::SETULE);
 3759     case ISD::SETULE: CCCode = ISD::SETUGE; FlipOperands = true; break;
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  381   case ISD::SETULE:
 2025       case ISD::SETULE: return getBoolConstant(C1.ule(C2), dl, VT, OpVT);
 2089     case ISD::SETULE: return getBoolConstant(R!=APFloat::cmpGreaterThan, dl,
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 2369                           DAG.getConstant(High-Low, dl, VT), ISD::SETULE);
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  412     case ISD::SETULE:                   return "setule";
lib/CodeGen/SelectionDAG/TargetLowering.cpp
  359     case ISD::SETULE:
 2874   } else if (Cond == ISD::CondCode::SETULE) {
 3307         case ISD::SETULE:
 3330       case ISD::SETULE: {
 3520     if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
 3664                  Cond == ISD::SETULE || Cond == ISD::SETUGT) {
 3665         bool AdjOne = (Cond == ISD::SETULE || Cond == ISD::SETUGT);
 3676           NewCond = (Cond == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE;
 3730             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE);
 3905     case ISD::SETULE: // X <=u Y  --> X == 0 | Y == 1  -->  ~X | Y
 5065                       ((Cond == ISD::SETEQ) ? ISD::SETULE : ISD::SETUGT));
 5285                    ((Cond == ISD::SETEQ) ? ISD::SETULE : ISD::SETUGT));
lib/Target/AArch64/AArch64ISelLowering.cpp
 1450   case ISD::SETULE:
 1506   case ISD::SETULE:
 1568   case ISD::SETULE:
 1997           CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT;
 2013       case ISD::SETULE:
 2019           CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE;
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
 1283   case ISD::SETULE:
lib/Target/AMDGPU/R600ISelLowering.cpp
  133   setCondCodeAction(ISD::SETULE, MVT::f32, Expand);
  137   setCondCodeAction(ISD::SETULE, MVT::i32, Expand);
lib/Target/AMDGPU/SIISelLowering.cpp
 9798            (CC == ISD::SETEQ || CC == ISD::SETGE || CC == ISD::SETULE)))
lib/Target/AMDGPU/SIInsertSkips.cpp
  237     case ISD::SETULE:
lib/Target/ARC/ARCISelLowering.cpp
   51   case ISD::SETULE:
lib/Target/ARM/ARMISelLowering.cpp
 1809   case ISD::SETULE: return ARMCC::LS;
 1836   case ISD::SETULE: CondCode = ARMCC::LE; break;
 4200           CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT;
 4211       case ISD::SETULE:
 4214           CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE;
 4615       CC == ISD::SETULE || CC == ISD::SETGE  || CC == ISD::SETLE)
 4625   if (CC == ISD::SETOLE || CC == ISD::SETULE || CC == ISD::SETOLT ||
 4637   if (CC == ISD::SETULE || CC == ISD::SETULT || CC == ISD::SETUGE ||
 6231     case ISD::SETULE: Invert = true; Opc = ARMCC::GT; break;
 6276     case ISD::SETULE: Swap = true; LLVM_FALLTHROUGH;
lib/Target/AVR/AVRISelLowering.cpp
  514   case ISD::SETULE: {
lib/Target/BPF/BPFISelLowering.cpp
  489   case ISD::SETULE:
  696   SET_NEWCC(SETULE, JULE);
lib/Target/Hexagon/HexagonISelLowering.cpp
 1510     setCondCodeAction(ISD::SETULE, VT, Expand);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
  119     setCondCodeAction(ISD::SETULE, T, Expand);
lib/Target/Lanai/LanaiISelLowering.cpp
  838   case ISD::SETULE:
lib/Target/MSP430/MSP430ISelLowering.cpp
 1050   case ISD::SETULE:
lib/Target/Mips/MipsISelLowering.cpp
  619   case ISD::SETULE: return Mips::FCOND_ULE;
lib/Target/Mips/MipsSEISelLowering.cpp
  960   case ISD::SETULE:
 1742                         Op->getOperand(2), ISD::SETULE);
 1748                         lowerMSASplatImm(Op, 2, DAG), ISD::SETULE);
 1851                         Op->getOperand(2), ISD::SETULE);
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
  566     case ISD::SETULE:
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
 3024   case ISD::SETULE: {
 3197   case ISD::SETULE: {
 3356   case ISD::SETULE: {
 3519   case ISD::SETULE: {
 3794         case ISD::SETULE:
 3821         case ISD::SETULE:
 3849   case ISD::SETULE:
 3879   case ISD::SETULE:
 3910       case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break;
 3918       case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break;
 3954       case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break;
 3963       case ISD::SETULE: CC = ISD::SETUGT; Negate = true; break;
lib/Target/PowerPC/PPCISelLowering.cpp
12003     case ISD::SETULE:
15549   case ISD::SETULE:
lib/Target/RISCV/RISCVISelLowering.cpp
  145       ISD::SETUGE, ISD::SETULT, ISD::SETULE, ISD::SETUNE, ISD::SETGT,
  339   case ISD::SETULE:
lib/Target/Sparc/SparcISelLowering.cpp
 1374   case ISD::SETULE: return SPCC::ICC_LEU;
 1398   case ISD::SETULE: return SPCC::FCC_ULE;
lib/Target/SystemZ/SystemZISelLowering.cpp
 1948   CONV(LE);
 2467   else if (Cond == ISD::SETLE || Cond == ISD::SETULE)
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
   89                     ISD::SETULT, ISD::SETULE, ISD::SETUGT, ISD::SETUGE})
lib/Target/X86/X86ISelLowering.cpp
 4677   case ISD::SETULE: return X86::COND_BE;
 4752   case ISD::SETULE:
20473   case ISD::SETULE: Swap = true; LLVM_FALLTHROUGH;
20617   case ISD::SETULE:
20722     case ISD::SETULE:
20817         Cond = ISD::SETULE;
20825     case ISD::SETULE: Opc = ISD::UMIN; break;
36869       case ISD::SETULE:
36967       case ISD::SETULE:
37186         CC = ISD::SETULE;
37192       if (CC == ISD::SETULE && Other == CondRHS &&
37204         if (CC == ISD::SETULE &&
lib/Target/X86/X86InstrInfo.cpp
 2323   case ISD::SETULE: