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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 885 const MachineRegisterInfo &MRI = MF.getRegInfo();
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc 378 const MachineRegisterInfo &MRI = MF.getRegInfo();
gen/lib/Target/ARM/ARMGenGlobalISel.inc 747 const MachineRegisterInfo &MRI = MF.getRegInfo();
gen/lib/Target/Mips/MipsGenGlobalISel.inc 612 const MachineRegisterInfo &MRI = MF.getRegInfo();
gen/lib/Target/RISCV/RISCVGenGlobalISel.inc 258 const MachineRegisterInfo &MRI = MF.getRegInfo();
gen/lib/Target/X86/X86GenGlobalISel.inc 751 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/AllocationOrder.cpp 36 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
lib/CodeGen/GlobalISel/CSEInfo.cpp 26 GISelInstProfileBuilder(ID, MI->getMF()->getRegInfo()).addNodeID(MI);
lib/CodeGen/GlobalISel/LegalizerInfo.cpp 739 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/GlobalISel/RegisterBankInfo.cpp 168 const MachineRegisterInfo &MRI = MF.getRegInfo();
620 Reg, MF.getRegInfo(), *MF.getSubtarget().getRegisterInfo())) &&
lib/CodeGen/LiveDebugVariables.cpp 1183 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/LivePhysRegs.cpp 178 const MachineRegisterInfo &MRI = MF.getRegInfo();
249 const MachineRegisterInfo &MRI = MF.getRegInfo();
260 const MachineRegisterInfo &MRI = MF.getRegInfo();
281 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/LiveRangeCalc.cpp 56 MRI = &MF->getRegInfo();
lib/CodeGen/LiveRegUnits.cpp 94 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/MIRParser/MIRParser.cpp 307 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/MIRPrinter.cpp 213 convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
667 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
707 const auto &MRI = MF->getRegInfo();
lib/CodeGen/MIRVRegNamerUtils.cpp 87 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/MachineBasicBlock.cpp 339 const MachineRegisterInfo &MRI = MF->getRegInfo();
lib/CodeGen/MachineCSE.cpp 267 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/MachineFrameInfo.cpp 123 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/MachineInstr.cpp 96 MRI = &MF->getRegInfo();
lib/CodeGen/MachineOperand.cpp 775 MRI = &MF->getRegInfo();
790 const MachineRegisterInfo &MRI = MF->getRegInfo();
lib/CodeGen/MachineTraceMetrics.cpp 70 MRI = &MF->getRegInfo();
lib/CodeGen/RegAllocPBQP.cpp 557 const MachineRegisterInfo &MRI = MF.getRegInfo();
570 const MCPhysReg *CSR = MF.getRegInfo().getCalleeSavedRegs();
lib/CodeGen/RegisterClassInfo.cpp 58 const MCPhysReg *CSR = MF->getRegInfo().getCalleeSavedRegs();
72 const BitVector &RR = MF->getRegInfo().getReservedRegs();
lib/CodeGen/RegisterCoalescer.cpp 417 const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo();
lib/CodeGen/RegisterPressure.cpp 274 MRI = &MF->getRegInfo();
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 325 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(Reg);
lib/CodeGen/SplitKit.cpp 175 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/TargetInstrInfo.cpp 451 const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
671 const MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
689 const MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
885 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/CodeGen/TargetRegisterInfo.cpp 389 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/Target/AArch64/AArch64InstrInfo.cpp 502 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
lib/Target/AArch64/AArch64InstructionSelector.cpp 4018 auto &MRI = MF.getRegInfo();
4637 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
4670 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 273 const MachineRegisterInfo &MRI = MF.getRegInfo();
422 const MachineRegisterInfo &MRI = MF.getRegInfo();
523 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp 620 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 2179 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
lib/Target/AMDGPU/AMDGPUMacroFusion.cpp 45 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp 342 const MachineRegisterInfo &MRI = MF.getRegInfo();
1905 const MachineRegisterInfo &MRI = MF.getRegInfo();
1924 const MachineRegisterInfo &MRI = MF.getRegInfo();
1939 const MachineRegisterInfo &MRI = MF.getRegInfo();
1975 const MachineRegisterInfo &MRI = MF.getRegInfo();
2034 const MachineRegisterInfo &MRI = MF.getRegInfo();
2114 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/Target/AMDGPU/GCNHazardRecognizer.cpp 49 MaxLookAhead = MF.getRegInfo().isPhysRegUsed(AMDGPU::AGPR0) ? 18 : 5;
592 if (!Use.isReg() || TRI.isVGPR(MF.getRegInfo(), Use.getReg()))
614 if (!Use.isReg() || !TRI->isVGPR(MF.getRegInfo(), Use.getReg()))
748 const MachineRegisterInfo &MRI = MF.getRegInfo();
770 const MachineRegisterInfo &MRI = MF.getRegInfo();
787 const MachineRegisterInfo &MRI = MF.getRegInfo();
835 if (!Use.isReg() || TRI->isVGPR(MF.getRegInfo(), Use.getReg()))
1220 if (!Use.isReg() || !TRI.isVGPR(MF.getRegInfo(), Use.getReg()))
1240 if (!Op.isReg() || !TRI.isAGPR(MF.getRegInfo(), Op.getReg()))
1377 if (!Op.isReg() || !TRI.isVGPR(MF.getRegInfo(), Op.getReg()))
lib/Target/AMDGPU/GCNRegPressure.cpp 294 MRI = &MF.getRegInfo();
356 MRI = &MI.getParent()->getParent()->getRegInfo();
lib/Target/AMDGPU/GCNRegPressure.h 243 MI.getParent()->getParent()->getRegInfo());
249 MI.getParent()->getParent()->getRegInfo());
lib/Target/AMDGPU/R600InstrInfo.cpp 1180 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/Target/AMDGPU/SIFixSGPRCopies.cpp 154 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
lib/Target/AMDGPU/SIISelLowering.cpp10834 const MachineRegisterInfo &MRI = MF->getRegInfo();
lib/Target/AMDGPU/SIInstrInfo.cpp 476 FirstLdSt.getParent()->getParent()->getRegInfo();
2125 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
2139 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
2597 const MachineRegisterInfo &MRI = MF->getRegInfo();
3197 const MachineRegisterInfo &MRI = MF->getRegInfo();
3738 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
3809 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
3952 const MachineRegisterInfo &MRI = MF.getRegInfo();
5801 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
lib/Target/AMDGPU/SIInstrInfo.h 674 const MachineRegisterInfo &MRI = MF.getRegInfo();
680 const MachineRegisterInfo &MRI = MF.getRegInfo();
822 MI.getParent()->getParent()->getRegInfo().
lib/Target/ARM/ARMAsmPrinter.cpp 1073 const MachineRegisterInfo &MachineRegInfo = MF.getRegInfo();
lib/Target/ARM/ARMBaseRegisterInfo.cpp 307 const MachineRegisterInfo &MRI = MF.getRegInfo();
417 const MachineRegisterInfo *MRI = &MF.getRegInfo();
lib/Target/ARM/ARMRegisterBankInfo.cpp 225 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/Target/Mips/MipsRegisterBankInfo.cpp 198 const MachineRegisterInfo &MRI = MF.getRegInfo();
212 const MachineRegisterInfo &MRI = MF.getRegInfo();
225 const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo();
340 const MachineRegisterInfo &MRI = MF.getRegInfo();
405 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/Target/Mips/MipsRegisterInfo.cpp 315 if (!MF.getRegInfo().canReserveReg(FP))
325 return MF.getRegInfo().canReserveReg(BP);
lib/Target/PowerPC/PPCFrameLowering.cpp 451 MachineRegisterInfo::def_iterator RI = MF.getRegInfo().def_begin(LR);
452 return RI !=MF.getRegInfo().def_end() || MFI->isLRStoreRequired();
lib/Target/PowerPC/PPCInstrInfo.cpp 191 &DefMI.getParent()->getParent()->getRegInfo();
768 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
3514 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
3997 const MachineRegisterInfo *MRI = &MF->getRegInfo();
4017 if (MF->getRegInfo().isLiveIn(VReg))
lib/Target/PowerPC/PPCRegisterInfo.cpp 163 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2);
lib/Target/SystemZ/SystemZInstrInfo.cpp 545 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
lib/Target/SystemZ/SystemZRegisterInfo.cpp 83 const MachineRegisterInfo *MRI = &MF.getRegInfo();
lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp 240 MI->getParent()->getParent()->getRegInfo();
lib/Target/X86/X86FrameLowering.cpp 2084 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/Target/X86/X86InstrInfo.cpp 612 const MachineRegisterInfo &MRI = MF.getRegInfo();
632 const MachineRegisterInfo &MRI = MF.getRegInfo();
2843 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
5077 MF.getRegInfo().getRegClass(LoadMI.getOperand(0).getReg());
lib/Target/X86/X86MachineFunctionInfo.cpp 23 for (const MCPhysReg *CSR = MF->getRegInfo().getCalleeSavedRegs();
lib/Target/X86/X86RegisterBankInfo.cpp 147 const MachineRegisterInfo &MRI = MF.getRegInfo();
163 const MachineRegisterInfo &MRI = MF.getRegInfo();
282 const MachineRegisterInfo &MRI = MF.getRegInfo();
lib/Target/X86/X86RegisterInfo.cpp 653 const MachineRegisterInfo *MRI = &MF.getRegInfo();