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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
include/llvm/CodeGen/MachineScheduler.h 304 LiveIntervals *getLIS() const { return LIS; }
lib/CodeGen/MachineScheduler.cpp 723 if (LIS)
724 LIS->handleMove(*MI, /*UpdateFlags=*/true);
998 TopRPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin,
1000 BotRPTracker.init(&MF, RegClassInfo, LIS, BB, LiveRegionEnd,
1130 const LiveInterval &LI = LIS->getInterval(Reg);
1135 VNI = LI.getVNInfoBefore(LIS->getMBBEndIdx(BB));
1137 LiveQueryResult LRQ = LI.Query(LIS->getInstructionIndex(*I));
1149 LI.Query(LIS->getInstructionIndex(*SU->getInstr()));
1265 RPTracker.init(&MF, RegClassInfo, LIS, BB, LiveRegionEnd,
1273 buildSchedGraph(AA, &RPTracker, &SUPressureDiffs, LIS, ShouldTrackLaneMasks);
1326 const LiveInterval &LI = LIS->getInterval(Reg);
1327 const VNInfo *DefVNI = LI.getVNInfoBefore(LIS->getMBBEndIdx(BB));
1331 MachineInstr *DefMI = LIS->getInstructionFromIndex(DefVNI->def);
1346 LiveQueryResult LRQ = LI.Query(LIS->getInstructionIndex(*SU->getInstr()));
1405 SlotIndex SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
1406 RegOpers.adjustLaneLiveness(*LIS, MRI, SlotIdx, MI);
1409 RegOpers.detectDeadDefs(*MI, *LIS);
1439 SlotIndex SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
1440 RegOpers.adjustLaneLiveness(*LIS, MRI, SlotIdx, MI);
1443 RegOpers.detectDeadDefs(*MI, *LIS);
lib/Target/AMDGPU/GCNIterativeScheduler.cpp 113 printRegion(OS, R->Begin, R->End, LIS, 1);
114 printLivenessInfo(OS, R->Begin, R->End, LIS);
125 printRegion(OS, R->Begin, R->End, LIS);
204 printRegion(dbgs(), Rgn.Begin, Rgn.End, Sch.LIS, 2));
243 , UPTracker(*LIS) {
274 printRegion(dbgs(), Begin, End, LIS), false));
283 GCNUpwardRPTracker RPTracker(*LIS);
314 LLVM_DEBUG(printLivenessInfo(dbgs(), RegionBegin, RegionEnd, LIS);
375 assert(LIS != nullptr);
387 LIS->handleMove(*MI, true);
399 auto SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
400 RegOpers.adjustLaneLiveness(*LIS, MRI, SlotIdx, MI);
462 LLVM_DEBUG(printRegion(dbgs(), R->Begin, R->End, LIS, 3);
463 printLivenessInfo(dbgs(), R->Begin, R->End, LIS));
lib/Target/AMDGPU/GCNSchedStrategy.cpp 337 if (LIS) {
351 if (!LIS)
406 LIS->handleMove(*MI, true);
417 SlotIndex SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
418 RegOpers.adjustLaneLiveness(*LIS, MRI, SlotIdx, MI);
421 RegOpers.detectDeadDefs(*MI, *LIS);
435 GCNDownwardRPTracker RPTracker(*LIS);
441 GCNDownwardRPTracker RPTracker(*LIS);
448 SlotIndexes *Ind = LIS->getSlotIndexes();
471 assert(isEqual(getLiveRegsBefore(*NonDbgMI, *LIS), LRS));
517 return getLiveRegMap(BBStarters, false /*After*/, *LIS);
541 if (!LIS || StartingOccupancy <= MinOccupancy)
lib/Target/AMDGPU/SIMachineScheduler.h 452 RPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin, false, false);
458 LiveIntervals *getLIS() { return LIS; }