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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
include/llvm/CodeGen/SelectionDAGNodes.h 960 ArrayRef<SDUse> ops() const { return makeArrayRef(op_begin(), op_end()); }
975 return make_range(value_op_iterator(op_begin()),
lib/CodeGen/SelectionDAG/DAGCombiner.cpp16652 Ops.append(InVec.getNode()->op_begin(),
17853 if (std::all_of(std::next(N->op_begin()), N->op_end(), [](const SDValue &Op) {
17863 SmallVector<SDValue, 4> Ops(In->op_begin(), In->op_end());
17946 Opnds.append(Op->op_begin(), Op->op_begin() + NumElts);
17946 Opnds.append(Op->op_begin(), Op->op_begin() + NumElts);
19373 SmallVector<SDValue, 8> Ops(N0->op_begin(), N0->op_end());
19644 std::all_of(std::next(Concat->op_begin()), Concat->op_end(),
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1350 SmallVector<SDValue, 6> NewLoadOperands(NewLoad->op_begin(),
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 1491 SmallVector<SDValue, 4> NewOps(N->op_begin(), N->op_end());
1510 SmallVector<SDValue, 4> NewOps(N->op_begin(), N->op_end());
1518 SmallVector<SDValue, 5> NewOps(N->op_begin(), N->op_end());
1538 SmallVector<SDValue, 5> NewOps(N->op_begin(), N->op_end());
lib/CodeGen/SelectionDAG/LegalizeTypes.cpp 508 NewOps.insert(NewOps.end(), N->op_begin(), N->op_begin() + i);
508 NewOps.insert(NewOps.end(), N->op_begin(), N->op_begin() + i);
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 1120 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
1120 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
1123 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
1141 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
1141 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
1144 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
3343 SmallVector<SDValue, 4> NewOps(N->op_begin(), N->op_end());
3584 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
4317 SmallVector<SDValue, 4> NewOps(N->op_begin(), N->op_end());
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp 142 SmallVector<SDValue, 8> Ops(N->op_begin(), N->op_end());
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 717 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
815 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
4240 Elts.append(Op->op_begin(), Op->op_end());
7529 if (std::equal(Ops.begin(), Ops.end(), N->op_begin()))
7558 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
7717 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 8837 Ops.append(Call->op_begin() + 2, e);
8850 Ops.push_back(*(Call->op_begin()));
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 2221 std::vector<SDValue> Ops(N->op_begin(), N->op_end());
lib/CodeGen/SelectionDAG/StatepointLowering.cpp 752 Ops.insert(Ops.end(), CallNode->op_begin() + 2, RegMaskIt);
lib/CodeGen/SelectionDAG/TargetLowering.cpp 2219 SmallVector<SDValue, 32> Ops(Op->op_begin(), Op->op_end());
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 1137 SmallVector<SDValue, 4> Regs(N->op_begin() + Vec0Off,
1138 N->op_begin() + Vec0Off + NumVecs);
1308 SmallVector<SDValue, 4> Regs(N->op_begin() + 2, N->op_begin() + 2 + NumVecs);
1308 SmallVector<SDValue, 4> Regs(N->op_begin() + 2, N->op_begin() + 2 + NumVecs);
1330 SmallVector<SDValue, 4> Regs(N->op_begin() + 1, N->op_begin() + 1 + NumVecs);
1330 SmallVector<SDValue, 4> Regs(N->op_begin() + 1, N->op_begin() + 1 + NumVecs);
1384 SmallVector<SDValue, 4> Regs(N->op_begin() + 2, N->op_begin() + 2 + NumVecs);
1384 SmallVector<SDValue, 4> Regs(N->op_begin() + 2, N->op_begin() + 2 + NumVecs);
1423 SmallVector<SDValue, 4> Regs(N->op_begin() + 1, N->op_begin() + 1 + NumVecs);
1423 SmallVector<SDValue, 4> Regs(N->op_begin() + 1, N->op_begin() + 1 + NumVecs);
1478 SmallVector<SDValue, 4> Regs(N->op_begin() + 2, N->op_begin() + 2 + NumVecs);
1478 SmallVector<SDValue, 4> Regs(N->op_begin() + 2, N->op_begin() + 2 + NumVecs);
1507 SmallVector<SDValue, 4> Regs(N->op_begin() + 1, N->op_begin() + 1 + NumVecs);
1507 SmallVector<SDValue, 4> Regs(N->op_begin() + 1, N->op_begin() + 1 + NumVecs);
lib/Target/AArch64/AArch64ISelLowering.cpp 2218 SmallVector<SDValue, 2> Ops(Op->op_begin(), Op->op_end());
2499 SmallVector<SDValue, 2> Ops(Op->op_begin(), Op->op_end());
lib/Target/AMDGPU/R600ISelLowering.cpp 1923 Ops.append(InVec.getNode()->op_begin(),
2222 std::vector<SDValue> Ops(Node->op_begin(), Node->op_end());
lib/Target/AMDGPU/SIISelLowering.cpp 4480 Ops.append(Intr->op_begin() + (HaveChain ? 2 : 1), Intr->op_end());
8103 SmallVector<SDValue, 8> NewOps(N->op_begin(), N->op_end());
10180 Ops.insert(Ops.end(), Node->op_begin(), Node->op_begin() + DmaskIdx);
10180 Ops.insert(Ops.end(), Node->op_begin(), Node->op_begin() + DmaskIdx);
10182 Ops.insert(Ops.end(), Node->op_begin() + DmaskIdx + 1, Node->op_end());
lib/Target/ARM/ARMISelDAGToDAG.cpp 4737 std::vector<SDValue> Ops(GU->op_begin(), GU->op_end()-1);
lib/Target/ARM/ARMISelLowering.cpp 7057 std::all_of(std::next(Op->op_begin()), Op->op_end(),
7278 SmallVector<SDValue, 64> Ops(Op->op_begin(), Op->op_begin() + NumElts);
7278 SmallVector<SDValue, 64> Ops(Op->op_begin(), Op->op_begin() + NumElts);
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 2857 SmallVector<SDValue, 8> Ops(N->op_begin() + 1, N->op_end());
3366 SmallVector<SDValue, 8> Ops(N->op_begin() + 1, N->op_end());
lib/Target/NVPTX/NVPTXISelLowering.cpp 2393 Ops.append(N->op_begin() + 2, N->op_end());
4869 SmallVector<SDValue, 8> OtherOps(N->op_begin(), N->op_end());
4995 OtherOps.append(N->op_begin() + 2, N->op_end());
5026 SmallVector<SDValue, 4> Ops(N->op_begin(), N->op_end());
lib/Target/PowerPC/PPCISelLowering.cpp12275 SmallVector<SDValue, 3> Ops(PromOp.getNode()->op_begin(),
12522 SmallVector<SDValue, 3> Ops(PromOp.getNode()->op_begin(),
lib/Target/Sparc/SparcISelDAGToDAG.cpp 252 std::vector<SDValue> Ops(GU->op_begin(), GU->op_end()-1);
lib/Target/X86/X86ISelDAGToDAG.cpp 736 Ops.append(OrigChain->op_begin() + 1, OrigChain->op_end());
743 Ops.append(Call->op_begin() + 1, Call->op_end());
lib/Target/X86/X86ISelLowering.cpp 5574 Ops.append(N->op_begin(), N->op_end());
9781 SmallVector<SDValue, 64> Ops(Op->op_begin(), Op->op_begin() + NumElems);
9781 SmallVector<SDValue, 64> Ops(Op->op_begin(), Op->op_begin() + NumElems);
20125 SmallVector<SDValue, 4> Ops(Op->op_begin(), Op->op_begin() + NumOperands);
20125 SmallVector<SDValue, 4> Ops(Op->op_begin(), Op->op_begin() + NumOperands);
23505 SmallVector<SDValue, 5> NewOps(Op->op_begin()+1, Op->op_end());
23520 SmallVector<SDValue, 5> NewOps(Op->op_begin()+1, Op->op_end());
23533 SmallVector<SDValue, 5> NewOps(Op->op_begin()+1, Op->op_end());
27654 SmallVector<SDValue, 2> Ops(Op->op_begin(), Op->op_end());
35520 SmallVector<SDValue, 4> Ops(N0->op_begin(), N0->op_end());
44391 SmallVector<SDValue, 4> Ops(N->op_begin(), N->op_end());