reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1722 if (N->hasOneUse() && N->use_begin()->getOpcode() == ISD::TokenFactor) 8842 N->hasOneUse() && N->use_begin()->getOpcode() == ISD::BRCOND; 10574 if (N->hasOneUse() && (N->use_begin()->getOpcode() == ISD::ANY_EXTEND)) 13064 N->use_begin()->getOpcode() == ISD::FP_ROUND)lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
95 assert(UI->getNodeId() == NewNode && 182 assert(UI->getNodeId() == NewNode && "NewNode used by non-NewNode!");lib/Target/AArch64/AArch64ISelLowering.cpp
9410 if (N->hasOneUse() && (N->use_begin()->getOpcode() == ISD::ADD || 9411 N->use_begin()->getOpcode() == ISD::SUB))lib/Target/AMDGPU/SIISelLowering.cpp
4383 if (I->getOpcode() == Opcode) 10117 if (!I->isMachineOpcode() || 10118 I->getMachineOpcode() != TargetOpcode::EXTRACT_SUBREG) 10125 Lane = SubIdx2Lane(I->getConstantOperandVal(1)); 10444 Node->use_begin()->isMachineOpcode() && 10445 Node->use_begin()->getMachineOpcode() == AMDGPU::EXTRACT_SUBREG && 10446 !Node->use_begin()->hasAnyUseOfValue(0))) {lib/Target/ARM/ARMISelLowering.cpp
2888 if (UI->getOpcode() != ISD::CopyToReg) 2897 SDValue UseChain = UI->getOperand(0); 2905 if (UI->getOperand(UI->getNumOperands()-1).getValueType() == MVT::Glue) 2905 if (UI->getOperand(UI->getNumOperands()-1).getValueType() == MVT::Glue) 2930 if (UI->getOpcode() != ARMISD::RET_FLAG && 2931 UI->getOpcode() != ARMISD::INTRET_FLAG) 5680 if (Move->getOpcode() != ARMISD::VMOVhr) 5722 if (N->use_size() != 1 || ZeroExtend->getOpcode() != ISD::ZERO_EXTEND || 5723 ZeroExtend->getValueType(0) != MVT::i32) 5726 auto Copy = ZeroExtend->use_begin(); 5727 if (Copy->getOpcode() == ISD::CopyToReg && 5728 Copy->use_begin()->getOpcode() == ARMISD::RET_FLAG) { 5728 Copy->use_begin()->getOpcode() == ARMISD::RET_FLAG) { 14145 assert((N->hasOneUse() && N->use_begin()->getOpcode() == ISD::BR) 14825 !ExtVal->use_begin()->isOnlyUserOf(ExtVal.getNode()))lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
2266 if (N->hasOneUse() && Opcode == N->use_begin()->getOpcode())
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 958 N->use_begin()->getOpcode() == HexagonISD::VSPLATW;
lib/Target/PowerPC/PPCISelDAGToDAG.cpp1040 Use->isMachineOpcode() ? Use->getMachineOpcode() : Use->getOpcode(); 1040 Use->isMachineOpcode() ? Use->getMachineOpcode() : Use->getOpcode(); 1040 Use->isMachineOpcode() ? Use->getMachineOpcode() : Use->getOpcode(); 1044 if (Use->isMachineOpcode()) 1047 std::max(MaxTruncation, Use->getValueType(0).getSizeInBits()); 1050 if (Use->isMachineOpcode())lib/Target/PowerPC/PPCISelLowering.cpp
2534 UI->getOpcode() != ISD::SCALAR_TO_VECTOR) 7590 if (UI->getOpcode() != ISD::SINT_TO_FP && 7591 UI->getOpcode() != ISD::UINT_TO_FP) 11929 UI->getOpcode() == ISD::TokenFactor) && !Visited.count(*UI)) 11989 if (UI->getOpcode() != ISD::ZERO_EXTEND) 13787 if (UI->getOpcode() == ISD::INTRINSIC_WO_CHAIN && 13788 cast<ConstantSDNode>(UI->getOperand(0))->getZExtValue() == IID) { 13802 if (UI->getOpcode() == ISD::ADD && 13803 isa<ConstantSDNode>(UI->getOperand(1)) && 13805 cast<ConstantSDNode>(UI->getOperand(1))->getZExtValue()) % 13810 if (VI->getOpcode() == ISD::INTRINSIC_WO_CHAIN && 13811 cast<ConstantSDNode>(VI->getOperand(0))->getZExtValue() == IID) { 13934 if (UI->getOpcode() == PPCISD::VCMPo && 13935 UI->getOperand(1) == N->getOperand(1) && 13936 UI->getOperand(2) == N->getOperand(2) && 13937 UI->getOperand(0) == N->getOperand(0)) {lib/Target/SystemZ/SystemZISelLowering.cpp
5535 if (UI->getOpcode() == SystemZISD::REPLICATE) {
lib/Target/X86/X86ISelDAGToDAG.cpp2667 if (UI->getOpcode() != ISD::CopyToReg || 2668 cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS) 2671 for (SDNode::use_iterator FlagUI = UI->use_begin(), 2672 FlagUE = UI->use_end(); FlagUI != FlagUE; ++FlagUI) { 2676 if (!FlagUI->isMachineOpcode()) return false; 2703 if (UI->getOpcode() != ISD::CopyToReg || 2704 cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS) 2707 for (SDNode::use_iterator FlagUI = UI->use_begin(), 2708 FlagUE = UI->use_end(); FlagUI != FlagUE; ++FlagUI) { 2712 if (!FlagUI->isMachineOpcode()) return false; 2759 unsigned UIOpc = UI->getOpcode(); 2763 if (cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS) 2766 for (SDNode::use_iterator FlagUI = UI->use_begin(), FlagUE = UI->use_end(); 2766 for (SDNode::use_iterator FlagUI = UI->use_begin(), FlagUE = UI->use_end(); 2772 if (!FlagUI->isMachineOpcode()) 2798 X86::CondCode CC = (X86::CondCode)UI->getConstantOperandVal(CCOpNo);lib/Target/X86/X86ISelLowering.cpp
2687 if (UI->getOpcode() != X86ISD::RET_FLAG) 2691 if (UI->getNumOperands() > 4) 2693 if (UI->getNumOperands() == 4 && 2694 UI->getOperand(UI->getNumOperands()-1).getValueType() != MVT::Glue) 2694 UI->getOperand(UI->getNumOperands()-1).getValueType() != MVT::Glue) 4514 unsigned Opcode = Op.getNode()->use_begin()->getOpcode(); 4882 if (UI->getOpcode() != ISD::EXTRACT_SUBVECTOR || !UI->hasOneUse() || 4882 if (UI->getOpcode() != ISD::EXTRACT_SUBVECTOR || !UI->hasOneUse() || 4883 UI->use_begin()->getOpcode() != ISD::STORE) 4883 UI->use_begin()->getOpcode() != ISD::STORE) 20084 if (UI->getOpcode() != ISD::CopyToReg && 20085 UI->getOpcode() != ISD::SETCC && 20086 UI->getOpcode() != ISD::STORE) 36774 if ((UI->getOpcode() != ISD::VSELECT && 36775 UI->getOpcode() != X86ISD::BLENDV) || 38178 N->use_begin()->getOpcode() == ISD::ADD)) 38676 switch (UI->getOpcode()) {