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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/CodeGen/DFAPacketizer.h 41 class InstrItineraryData;
include/llvm/CodeGen/ScoreboardHazardRecognizer.h 25 class InstrItineraryData;
include/llvm/CodeGen/TargetInstrInfo.h 43 class InstrItineraryData;
include/llvm/CodeGen/TargetSubtargetInfo.h 32 class InstrItineraryData;
include/llvm/MC/MCSchedule.h 29 class InstrItineraryData;
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h 30 class InstrItineraryData;
lib/Target/ARM/ARMISelLowering.h 42 class InstrItineraryData;
References
gen/lib/Target/AArch64/AArch64GenSubtargetInfo.inc17974 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/AMDGPU/AMDGPUGenSubtargetInfo.inc 788 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/AMDGPU/R600GenDFAPacketizer.inc 300 DFAPacketizer *R600GenSubtargetInfo::createDFAPacketizer(const InstrItineraryData *IID) const {
gen/lib/Target/AMDGPU/R600GenSubtargetInfo.inc 312 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/ARC/ARCGenSubtargetInfo.inc 138 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/ARM/ARMGenSubtargetInfo.inc19574 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/AVR/AVRGenSubtargetInfo.inc 539 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/BPF/BPFGenSubtargetInfo.inc 161 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/Hexagon/HexagonGenDFAPacketizer.inc37741 DFAPacketizer *HexagonGenSubtargetInfo::createDFAPacketizer(const InstrItineraryData *IID) const {
gen/lib/Target/Hexagon/HexagonGenSubtargetInfo.inc 4685 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/Lanai/LanaiGenSubtargetInfo.inc 219 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/MSP430/MSP430GenSubtargetInfo.inc 162 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/Mips/MipsGenSubtargetInfo.inc 3865 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc 237 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/PowerPC/PPCGenSubtargetInfo.inc 8214 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/RISCV/RISCVGenSubtargetInfo.inc 275 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/Sparc/SparcGenSubtargetInfo.inc 531 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/SystemZ/SystemZGenSubtargetInfo.inc 5176 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/WebAssembly/WebAssemblyGenSubtargetInfo.inc 180 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/X86/X86GenSubtargetInfo.inc21499 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
gen/lib/Target/XCore/XCoreGenSubtargetInfo.inc 139 DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
include/llvm/CodeGen/DFAPacketizer.h 80 const InstrItineraryData *InstrItins;
84 DFAPacketizer(const InstrItineraryData *InstrItins, Automaton<uint64_t> a) :
133 const InstrItineraryData *getInstrItins() const { return InstrItins; }
include/llvm/CodeGen/MachinePipeliner.h 64 const InstrItineraryData *InstrItins;
include/llvm/CodeGen/ResourcePriorityQueue.h 62 const InstrItineraryData* InstrItins;
include/llvm/CodeGen/ScoreboardHazardRecognizer.h 94 const InstrItineraryData *ItinData;
108 ScoreboardHazardRecognizer(const InstrItineraryData *II,
include/llvm/CodeGen/TargetInstrInfo.h 1345 CreateTargetMIHazardRecognizer(const InstrItineraryData *,
1351 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *,
1413 virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
1424 virtual int getOperandLatency(const InstrItineraryData *ItinData,
1436 virtual int getOperandLatency(const InstrItineraryData *ItinData,
1444 virtual unsigned getInstrLatency(const InstrItineraryData *ItinData,
1450 virtual int getInstrLatency(const InstrItineraryData *ItinData,
1457 int computeDefOperandLatency(const InstrItineraryData *ItinData,
include/llvm/CodeGen/TargetSchedule.h 35 InstrItineraryData InstrItins;
79 const InstrItineraryData *getInstrItineraries() const {
include/llvm/CodeGen/TargetSubtargetInfo.h 131 virtual const InstrItineraryData *getInstrItineraryData() const {
include/llvm/MC/MCSchedule.h 367 getReciprocalThroughput(unsigned SchedClass, const InstrItineraryData &IID);
include/llvm/MC/MCSubtargetInfo.h 207 InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const;
210 void initInstrItins(InstrItineraryData &InstrItins) const;
lib/CodeGen/MachinePipeliner.cpp 906 const InstrItineraryData *InstrItins;
lib/CodeGen/MachineScheduler.cpp 2729 const InstrItineraryData *Itin = SchedModel->getInstrItineraries();
3335 const InstrItineraryData *Itin = SchedModel->getInstrItineraries();
lib/CodeGen/PostRASchedulerList.cpp 212 const InstrItineraryData *InstrItins =
lib/CodeGen/ScoreboardHazardRecognizer.cpp 31 const InstrItineraryData *II, const ScheduleDAG *SchedDAG,
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h 50 const InstrItineraryData *InstrItins;
lib/CodeGen/TargetInstrInfo.cpp 1019 CreateTargetMIHazardRecognizer(const InstrItineraryData *II,
1027 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
1038 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
1054 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
1069 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,
1100 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
1114 const InstrItineraryData *ItinData = SchedModel.getInstrItineraries();
1140 int TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
1153 const InstrItineraryData *ItinData, const MachineInstr &DefMI) const {
lib/CodeGen/TwoAddressInstructionPass.cpp 96 const InstrItineraryData *InstrItins;
lib/MC/MCDisassembler/Disassembler.cpp 178 InstrItineraryData IID = STI->getInstrItineraryForCPU(DC->getCPU());
lib/MC/MCSchedule.cpp 135 const InstrItineraryData &IID) {
lib/MC/MCSubtargetInfo.cpp 308 InstrItineraryData
314 void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
lib/Target/AMDGPU/AMDGPUSubtarget.h 284 InstrItineraryData InstrItins;
441 const InstrItineraryData *getInstrItineraryData() const override {
1222 InstrItineraryData InstrItins;
1243 const InstrItineraryData *getInstrItineraryData() const override {
lib/Target/AMDGPU/R600InstrInfo.cpp 637 const InstrItineraryData *II = STI.getInstrItineraryData();
1009 unsigned int R600InstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
lib/Target/AMDGPU/R600InstrInfo.h 208 unsigned int getInstrLatency(const InstrItineraryData *ItinData,
lib/Target/AMDGPU/SIInstrInfo.cpp 6151 SIInstrInfo::CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
lib/Target/AMDGPU/SIInstrInfo.h 964 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
lib/Target/ARM/ARMBaseInstrInfo.cpp 126 const InstrItineraryData *II =
134 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
3332 static unsigned getNumMicroOpsSwiftLdSt(const InstrItineraryData *ItinData,
3634 unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,
3748 ARMBaseInstrInfo::getVLDMDefCycle(const InstrItineraryData *ItinData,
3805 ARMBaseInstrInfo::getLDMDefCycle(const InstrItineraryData *ItinData,
3840 ARMBaseInstrInfo::getVSTMUseCycle(const InstrItineraryData *ItinData,
3880 ARMBaseInstrInfo::getSTMUseCycle(const InstrItineraryData *ItinData,
3909 ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
4253 int ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
4290 const InstrItineraryData *ItinData, const MachineInstr &DefMI,
4350 ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
4625 unsigned ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
4676 int ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
4718 const InstrItineraryData *ItinData = SchedModel.getInstrItineraries();
lib/Target/ARM/ARMBaseInstrInfo.h 129 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
315 unsigned getNumMicroOps(const InstrItineraryData *ItinData,
318 int getOperandLatency(const InstrItineraryData *ItinData,
322 int getOperandLatency(const InstrItineraryData *ItinData,
350 int getVLDMDefCycle(const InstrItineraryData *ItinData,
354 int getLDMDefCycle(const InstrItineraryData *ItinData,
358 int getVSTMUseCycle(const InstrItineraryData *ItinData,
362 int getSTMUseCycle(const InstrItineraryData *ItinData,
366 int getOperandLatency(const InstrItineraryData *ItinData,
372 int getOperandLatencyImpl(const InstrItineraryData *ItinData,
381 unsigned getInstrLatency(const InstrItineraryData *ItinData,
385 int getInstrLatency(const InstrItineraryData *ItinData,
lib/Target/ARM/ARMHazardRecognizer.h 34 ARMHazardRecognizer(const InstrItineraryData *ItinData,
lib/Target/ARM/ARMISelLowering.h 643 const InstrItineraryData *Itins;
lib/Target/ARM/ARMSubtarget.h 492 InstrItineraryData InstrItins;
818 const InstrItineraryData *getInstrItineraryData() const override {
lib/Target/Hexagon/HexagonHazardRecognizer.h 44 HexagonHazardRecognizer(const InstrItineraryData *II,
lib/Target/Hexagon/HexagonInstrInfo.cpp 1753 const InstrItineraryData *II, const ScheduleDAG *DAG) const {
1852 unsigned HexagonInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
1860 const InstrItineraryData *II = STI.getInstrItineraryData();
4074 const InstrItineraryData *ItinData, const MachineInstr &MI) const {
4093 int HexagonInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
4331 const InstrItineraryData &II = *Subtarget.getInstrItineraryData();
lib/Target/Hexagon/HexagonInstrInfo.h 264 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
277 unsigned getInstrLatency(const InstrItineraryData *ItinData,
309 int getOperandLatency(const InstrItineraryData *ItinData,
450 unsigned getInstrTimingClassLatency(const InstrItineraryData *ItinData,
lib/Target/Hexagon/HexagonMachineScheduler.cpp 262 const InstrItineraryData *Itin = DAG->getSchedModel()->getInstrItineraries();
lib/Target/Hexagon/HexagonSubtarget.h 92 InstrItineraryData InstrItins;
100 const InstrItineraryData *getInstrItineraryData() const override {
lib/Target/Mips/MipsSubtarget.h 202 InstrItineraryData InstrItins;
384 const InstrItineraryData *getInstrItineraryData() const override {
lib/Target/PowerPC/PPCHazardRecognizers.h 34 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData,
lib/Target/PowerPC/PPCInstrInfo.cpp 114 const InstrItineraryData *II =
125 PPCInstrInfo::CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
145 unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
175 int PPCInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
lib/Target/PowerPC/PPCInstrInfo.h 205 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
208 unsigned getInstrLatency(const InstrItineraryData *ItinData,
212 int getOperandLatency(const InstrItineraryData *ItinData,
216 int getOperandLatency(const InstrItineraryData *ItinData,
lib/Target/PowerPC/PPCSubtarget.h 84 InstrItineraryData InstrItins;
177 const InstrItineraryData *getInstrItineraryData() const override {